SDRAM_TSREX_NSWell, Okay. Now writing what I have done till this moment.
I have LPC54608J512BD208 mcu and IS42S216100H - 7TLI sdram on my custom board (C.B).
I have LPC 546xx Evaluation Board (E.B) includes LPC54608FET180 mcu and MT48LC8M16A2B4-6A XIT sdram.
Sdram on E.Board
Clock Frequency = 167 MHz, 128 Mbits = 16 MByte ( 4 banks, 12 rows, 9 columns ), 4096 rows, 512 columns. 16 bits communication.
Sdram on C.Board
Clock Frequency = 143 MHz, 16 Mbits = 2 MByte ( 2 banks, 11 rows, 8 columns ), 2048 rows, 256 columns, 16 bits communication.
I might make a mistake about connecting sdram to mcu. You can see my sdram connection to mcu. I connected everything according to E.B. A11 pin is IS42's bank select pin. It has no BA0 or BA1 pin. I connected it directly EMC_A11 pin on mcu. This could be my mistake. There is written on page 637 of LPC546xx User Manual (UM10912) "The SDRAM bank select pins BA1 and BA0 are connected to address lines A14 and A13, respectively." Then I soldered A11 pin on sdram to A14 line on mcu and nothing changed. Didn't try A13 line. While these happening pin_mux.c settings are okay.
I didn't change anything on fsl_emc.c file. Just changed something on board.c and emc_sdram.c files.
- I could not find "SDRAM_TSREX_NS" in both datasheets but it is similar to SDRAM_XSR_NS. So i defined it same( also the same as E.B.
- I could not find "SDRAM_TAPR_NS" in both datasheets but it is similar to SDRAM_TRP_NS. So i defined it same( also the same as E.B.
- I could make a mistake while defining tWr_Ns and tDal_Ns.
- I could not find "SDRAM_RFC_NS" in IS42's datasheet. Defined it as equals to "SDRAM_TRC_NS".
- SDRAM_RAS_NCLK is defined < Active to read/write delay tRCD.. and tRCD for MT48LC is 18. but it's unit is ns in datasheet. while configuring emc, we need it in nclk. it is 2 for MT48LC. I don't understand that part.
- SDRAM_MODEREG_VALUE is 0x23 for MT48LC. That means
Cas Latency = 2
Burst Type = Sequential
Burst Length = 0,8,8
- I configured SDRAM_MODEREG_VALUE 0x23, 0x33 for IS42S.
Cas Latency = 2 or 3
Burst Type = Sequential
Burst Length = 0,8,8
- I configured SDRAM_DEV_MEMORYMAP 0x01 according to table 656 on page 636 of LPC546xx User Manual (UM10912).


What should I do ? ( Please don't suggest me some application notes for different mcu's. I checked some of them and I searched it on nxp community platform and analyzed some topics.)
How am I checking its truth ? via led on the board. Port 2 Pin 10. If sth went wrong led is turning off. SDRAM_DataBusCheck function works but
in SDRAM_AddressBusCheck it fails.
#include "board.h"
#include "fsl_debug_console.h"
#include "fsl_emc.h"
#include <stdbool.h>
#include "pin_mux.h"
#define SDRAM_BASE_ADDR 0xa0000000
#define SDRAM_SIZE_BYTES (2 * 1024 * 1024)
#define SDRAM_EXAMPLE_DATALEN (SDRAM_SIZE_BYTES / 4)
#define SDRAM_TEST_PATTERN (2)
status_t SDRAM_DataBusCheck(volatile uint32_t *address)
{
uint32_t data = 0;
for (data = 1; data != 0; data <<= 1)
{
*address = data;
if (*address != data)
{
GPIO_PinWrite(GPIO, 2, 10, 0);
return kStatus_Fail;
}
}
return kStatus_Success;
}
status_t SDRAM_AddressBusCheck(volatile uint32_t *address, uint32_t bytes)
{
uint32_t pattern = 0x55555555;
uint32_t size = bytes / 4;
uint32_t offset;
uint32_t checkOffset;
/* write the pattern to the power-of-two address. */
for (offset = 1; offset < size; offset <<= 1)
{
address[offset] = pattern;
}
address[0] = ~pattern;
/* Read and check. */
for (offset = 1; offset < size; offset <<= 1)
{
if (address[offset] != pattern)
{
GPIO_PinWrite(GPIO, 2, 10, 0);
return kStatus_Fail;
}
}
if (address[0] != ~pattern)
{return kStatus_Fail;}
for (offset = 1; offset < size; offset <<= 1)
{
address[offset] = ~pattern;
for (checkOffset = 1; checkOffset < size; checkOffset <<= 1)
{
if ((checkOffset != offset) && (address[checkOffset] != pattern))
{
return kStatus_Fail;
}
}
address[offset] = pattern;
}
return kStatus_Success;
}
void delay(uint32_t a)
{
static uint32_t i = 0;
for (i = 0; i < a; ++i) {__asm("NOP");}
}
int main(void)
{
gpio_pin_config_t led_config = {kGPIO_DigitalOutput, 0,};
uint32_t index;
uint32_t *sdram = (uint32_t *)SDRAM_BASE_ADDR; /* SDRAM start address. */
CLOCK_EnableClock(kCLOCK_InputMux);
CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH);
BOARD_InitPins();
BOARD_BootClockFROHF96M();
BOARD_InitDebugConsole();
BOARD_InitSDRAM();
GPIO_PortInit(GPIO, 2);
GPIO_PinInit(GPIO, 2, 10, &led_config);
GPIO_PinWrite(GPIO, 2, 10, 1);
delay(3000000);
while (1){
if (SDRAM_DataBusCheck(sdram) != kStatus_Success) { }
if (SDRAM_AddressBusCheck(sdram, SDRAM_SIZE_BYTES) != kStatus_Success) { }
for (index = 0; index < SDRAM_EXAMPLE_DATALEN; index++) { *(uint32_t *)(sdram + index) = index;}
for (index = 0; index < SDRAM_EXAMPLE_DATALEN; index++) { if (*(uint32_t *)(sdram + index) != index){break;}}
EMC_Deinit(EMC);
}
}