LPCOpen can't work with arm-none-eabi-gcc toolchain

[lpcware]

Content originally posted in LPCWare by Max Chen on Fri Jul 04 20:27:02 MST 2014
Hi All,

I try to compile an example, periph_ritimer, from lpcopen by arm-none-eabi-gcc toolchain,  no any error and and axf file is generated.But when I download it in my LCP-LINK2(as an evaluation board), nothing happen. I have modify the code let the led blink and it work when I compile the code
with lpcxpresso, but same code no work when I use arm-none-eabi-gcc.

I also try to debug it with jlink, the code can run to while(1) in main, this may mean no interrupt happen when compile by arm-none-eabi-gcc.

The attachment is the makefile and ld script, please some one help me.
Thank you.

Original Attachment has been moved to: periph_ritimer_makefile.zip

[lpcware]

Content originally posted in LPCWare by Max Chen on Thu Jul 10 01:59:40 MST 2014
Thank your for your reply.

My target MCU is LPC4370 on a LPC-LINK2, I use this LPC-LINK2 as an evaluation board.
Code is download to SPIFI by jlink.
VTOR is set in sysinit.c from the periph_ritimer example.

unsigned int *pSCB_VTOR = (unsigned int *) 0xE000ED08;
extern void *g_pfnVectors;
*pSCB_VTOR = (unsigned int) &g_pfnVectors;

And vector table g_pfnVectors is placed in SPIFI by the ld script as the attachment.
compiler is arm-none-eabi-gcc gcc version 4.7.4 20130913 (release) [ARM/embedded-4_7-branch revision 202601] (GNU Tools for ARM Embedded Processors)

[lpcware]

Content originally posted in LPCWare by bavarian on Mon Jul 07 05:15:20 MST 2014
I assume that you have a problem with the setting of the vector interrupt table base address in the Cortex-Mx register VTOR.
This register needs to be set correctly in order to execute the ISRs. Where ever the IRQ table in memory is, the address in VTOR needs to point to it.
Debuggers normally set this address to the internal SRAM of the MCU, using an init script. Alternatively (or in addition) VTOR can also be set to the correct location in the application code, e.g. at the beginning of system_init. So if you always download to RAM then you can set this to the right loaction in RAM. If you always flash into SPIFI you need to set it to the right address in the SPIFI memory area.

LPCXpresso is also based on the GCC compiler, so the difference must be somewhere outside the compilation environment (source code + compiler).

Hope this helps to solve the problem,
NXP Support Team.

P.S.  even if this problem is not really MCU specific it would always be good to know which MCU and which tool/compiler/debugger version you use.