LPC865M201JHI48 USART DRIVER EXAMPLE DOUBT

[BerlinRaj]

Hi, I am using an LPC865M201JHI48 customized microcontroller board. I copied the SDK example of the LPC865 USART polling method and used it in my code. However, it is transmitting some garbage values. For example, if I transmit 'a', I receive '0' on my serial terminal software, PuTTY. I am unable to understand some parts of the code. Can anyone explain which registers should be configured in the

USART_Init(EXAMPLE_USART, &config, EXAMPLE_USART_CLK_FREQ);  function? Why are we using the default configuration function USART_GetDefaultConfig(&config); ?

status_t USART_Init(USART_Type *base, const usart_config_t *config, uint32_t srcClock_Hz)

{

    /* Check arguments */

    assert(!((NULL == base) || (NULL == config) || (0U == srcClock_Hz)));

#if defined(FSL_FEATURE_USART_HAS_RXIDLETO_CHECK) && FSL_FEATURE_USART_HAS_RXIDLETO_CHECK

    assert(8U > config->rxIdleTimeout);

#endif

    status_t status = kStatus_Success;

    uint32_t instance = USART_GetInstance(base);

#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)

    /* Enable the clock. */

    CLOCK_EnableClock(s_usartClock[instance]);

#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */

#if !(defined(FSL_SDK_DISABLE_DRIVER_RESET_CONTROL) && FSL_SDK_DISABLE_DRIVER_RESET_CONTROL)

    /* Reset the module. */

    RESET_PeripheralReset(s_usartRest[instance]);

#endif /* FSL_SDK_DISABLE_DRIVER_RESET_CONTROL */

//CLOCK_EnableClock(s_usartClock[instance]);

// SYSCON->SYSAHBCLKCTRL0 |= (1<<14);

/* Reset the module. */

//RESET_PeripheralReset(s_usartRest[instance]);

// SYSCON->PRESETCTRL0 &=~(1<<14);//Assert the usart0 reset

// SYSCON->PRESETCTRL0 |= (1<<14);//Clear the usart0 reset

// USART0->CFG &= ~(0x30);//NO PARITY

// USART0->CFG &= ~(1<<6);//ONE STOP BIT

// USART0->CFG &= ~(1<<11);//Asynchronous mode is selected.

// USART0->CFG &= ~(1<<6);//ONE STOP BIT

// USART0->CFG &= ~(0x3 << 2);//clear 8-bit data length

// USART0->CFG |= (0x1 << 2);//set the 8-bit data length

// USART0->CFG |= (1 << 14);//usart0 in master mode

// USART0->CFG |= (1 << 0);//Enable the uart

    /* Setup configuration and enable USART to configure other register. */

    base->CFG = USART_CFG_PARITYSEL(config->parityMode) | USART_CFG_STOPLEN(config->stopBitCount) |

                USART_CFG_SYNCEN((uint32_t)config->syncMode >> 1) |

                USART_CFG_DATALEN((uint8_t)config->bitCountPerChar) | USART_CFG_LOOP(config->loopback) |

                USART_CFG_SYNCMST(config->syncMode) | USART_CFG_CLKPOL(config->clockPolarity) |

                USART_CFG_CTSEN(config->enableHardwareFlowControl) | USART_CFG_ENABLE_MASK;

#if defined(FSL_FEATURE_USART_HAS_RXIDLETO_CHECK) && FSL_FEATURE_USART_HAS_RXIDLETO_CHECK

    base->CTL |= USART_CTL_RXIDLETOCFG(config->rxIdleTimeout);

#endif

#if defined(FSL_SDK_USART_DRIVER_ENABLE_BAUDRATE_AUTO_GENERATE) && (FSL_SDK_USART_DRIVER_ENABLE_BAUDRATE_AUTO_GENERATE)

    if (0U != config->baudRate_Bps)

    {

        /* Setup baudrate */

        if (kStatus_Success != USART_SetBaudRate(base, config->baudRate_Bps, srcClock_Hz))

        {

            status = kStatus_USART_BaudrateNotSupport;

        }

    }

#else

    base->BRG       = FSL_SDK_USART_BRG_VALUE;

#if defined(FSL_FEATURE_USART_HAS_OSR_REGISTER) && (FSL_FEATURE_USART_HAS_OSR_REGISTER)

    base->OSR       = FSL_SDK_USART_BRG_VALUE;

#endif /* FSL_FEATURE_USART_HAS_OSR_REGISTER */

#endif /* FSL_SDK_USART_DRIVER_ENABLE_BAUDRATE_AUTO_GENERATE */

    if (status == kStatus_Success)

    {

        USART_EnableContinuousSCLK(base, config->enableContinuousSCLK);

        /* Setup the USART transmit and receive. */

        USART_EnableTx(base, config->enableTx);

        USART_EnableRx(base, config->enableRx);

    }

    return status;

}

[Harry_Zhang]

Hi @BerlinRaj 

USART_GetDefaultConfig(&config) 

This function is used  to obtain the common default configuration. You can also customize the configuration according to your needs.

USART_Init(EXAMPLE_USART, &config, EXAMPLE_USART_CLK_FREQ)

This function initializes USART based on the previous configuration.

As you mentioned "f I transmit 'a', I receive '0' on my serial terminal software, PuTTY."

I completely agree with @frank_m, you should observe the output signal through an oscilloscope, which can show both the clock frequency and the bit.

Hope this will help you.

BR

Hang

[BerlinRaj]

I am using the internal oscillator. That may be the reason for the issue?.

[frank_m]

This might well be.
I don't have a LPC865 eval board, much less your custom board.
But a change in the clock tree surely affects all peripherals, whose clock generation is derived (usually) from the core clock.

As said, I highly recommend to check the UART signal with a scope. It will also reveal the actual baudrate.

[frank_m]

> Hi, I am using an LPC865M201JHI48 customized microcontroller board. I copied the SDK example of the LPC865 USART polling method ...

You will have to make sure the SDK example applies (correct MCU and ext. quartz oscillator), and that that your custom board design is correct so far.

> However, it is transmitting some garbage values. For example, if I transmit 'a', I receive '0' on my serial terminal software, PuTTY.

Take a scope and measure actual signal. Otherwise you are just poking around in the dark.
Both baudrate and signal level could be incorrect. A 3.3V MCU output is not able to drive a TTL level input of a serial adapter.

> // USART0->CFG &= ~(0x30);//NO PARITY 
> ...
I'm not going to decode the bit operation with the datasheet / user manual.
Start with the actual UART signal.