LPC804 Leading Edge Aligned PWM

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LPC804 Leading Edge Aligned PWM

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mike_katz
Contributor I

Is there anyway to get the CTIMER on the LPC804 to do Leading Edge Aligned PWM (have the active part of the duty cycle before the inactive part)?

My application requires this and just subtracting the desired duty cycle from 100 won't do what I want either.

Thank you...

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Mike,

As you know that PWM output signals from the CTIMER are  trailing edge alignment PWM signals, when the counter begins, all PWM signal are low, when the counter reaches to the match register value, the PWM signal becomes high, it remains high until the PWM cycle is over. There is no way to get the leading-edge alignment PWM signals.

If possible, you can connect an external inverter gate, and you can invert the PWM signals so that you can get trailing edge alignment signals for the multiple PWM signals.

Hope

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