LPC804 I2C Clock stretching

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

LPC804 I2C Clock stretching

2,553 次查看
364gautham
Contributor I

How to implement Clock Stretching in I2c for Slave? 

I have configured I2C0 as Slave. On reads from master - I need to support clock stretching after address ACK. Any help is appreciated?

标签 (1)
0 项奖励
回复
3 回复数

2,536 次查看
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

Pls refer to the section 15.6.16 in UM11065.pdf, after you have received the data as I2C slave via polling mode or interrupt mode with status register, you can read it from MONRXDAT register, if you want to extend the I2C lock LOW time, you can set the I2C->CFG[MONCLKSTR] bit, the slave will drive the SCL low until the bit is cleared.

 

xiangjun_rong_0-1638856512088.png

 

Hope it can help you

BR

XiangJun Rong

 

0 项奖励
回复

2,527 次查看
364gautham
Contributor I

Thanks XiangJun Rong for the reply.

Here I think we are trying to stretch before ACK pulse of I2C. I want to stretch after I send ACK to master, i.e. Master starts read operation, after sending slave address, slave acks, immediately post ACK, I need to stretch clock low until data is ready in the slave. Thanks

0 项奖励
回复

2,513 次查看
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

 

As I said that  you can set the I2C->CFG[MONCLKSTR] bit, the slave will drive the SCL low until the bit is cleared.

But it is a question when you set the I2C->CFG[MONCLKSTR] bit, you can poll the I2C status register STAT[SLVSTATE], when the STAT[SLVSTATE]=01 in binary, you know that the lpc804 i2C slave has received data, I think the ACK signal is driven by receiver automatically, then you can poll the STAT[SLVPENDING] bit, if it is 1, it means that ACK has driven out, you can set the I2C->CFG[MONCLKSTR] bit to stretch the SCL low.

Pls I never test above, pls have  try.

BR

XiangJun Rong

0 项奖励
回复