LPC802 frequency Generation

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LPC802 frequency Generation

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kavya_akas
Contributor II

Hi,

I was using the LPC802 Controller.Where I was generate the Frequency up to 345khz When toggle the gpio pin.Is it possible to generate up to 2.4MHz.

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Pavel_Hernandez
NXP TechSupport
NXP TechSupport

Hello, sorry for the late response, I was researching more information on the reference manual and datasheet. 

The maximum clock source is 15mhz.

Pavel_Hernandez_0-1698098854843.png

The documentation of the Ctimer source is from the AHBCLKCTRL0.

The LPC802 supports a clock up to 15MHz which gives us a clock cycle period of 66ns, and the documentation regarding interrupt latency of Arm (You can look at it on this link Interrupt Latency) states that the Cortex-M0+'s clock cycles with zero wait state memory are 15.

Interrupt Time = CyclesClock * period = 15 * 66ns = 1us 

Beginner guide on interrupt latency and Arm Cortex-M processors - Architectures and Processors blog ...

After reviewing the documentation value below 1us is not possible. 

Best regards,
Pavel

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Pavel_Hernandez
NXP TechSupport
NXP TechSupport

Hello, my name is Pavel, and I will be supporting your case, could you elaborate further about how you your questions? Did you use the Ctimer example on the SDK?

Let me research more information about the last question.

Best regards,
Pavel

 

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kavya_akas
Contributor II
I need to toggle a PIN (P0_17) for every 400ns. How can I achieve it?  While I trying to configure this using CTIMER, I can able to go upto 10 us minimum (in 15MHz core frequency and MR Value as 120). If i try to reduce the MR value, no proper changes happen as per the expected level of time period.
Also  In polling method,  i make a code only for toggle as following main(){while(1){
GPIO->SET[0]|=(1<<17);
GPIO->CLR[0]|=(1<<17);
}}
In this also, it achieve only upto 340 KHz(nearly 2.4 us).

Kindly give the solution for this.
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Pavel_Hernandez
NXP TechSupport
NXP TechSupport

Hello, I do not recommend using the timer at 1ns, intend of I recommend using it at a minimum of 100ns if you are using an interrupt put a counter or other solution to count 4 cycles to get 400ns.

Best regards,
Pavel

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kavya_akas
Contributor II

I tried to configure timer for 100 ns (using MR value of 1 and 2), but it works only upto 10 us (MR value of 120)

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582 Views
Pavel_Hernandez
NXP TechSupport
NXP TechSupport

Hello, sorry for the late response, I was researching more information on the reference manual and datasheet. 

The maximum clock source is 15mhz.

Pavel_Hernandez_0-1698098854843.png

The documentation of the Ctimer source is from the AHBCLKCTRL0.

The LPC802 supports a clock up to 15MHz which gives us a clock cycle period of 66ns, and the documentation regarding interrupt latency of Arm (You can look at it on this link Interrupt Latency) states that the Cortex-M0+'s clock cycles with zero wait state memory are 15.

Interrupt Time = CyclesClock * period = 15 * 66ns = 1us 

Beginner guide on interrupt latency and Arm Cortex-M processors - Architectures and Processors blog ...

After reviewing the documentation value below 1us is not possible. 

Best regards,
Pavel