Hi Harry,
Thanks for your suggestion.
I compared the DAM and ADC. I thought my DAM was almost identical to the example and found something interesting in ADC's register:

I took the screen shot when my firmware stuck at the while loop, and FCTRL[0] = 0x00090007.
According to the manual, bit 0:4 is FCOUNT. I tried different watermark like 6 or 8 and when it got stuck, FCOUNT is always smaller than watermark by 2.
Then I changed the watermark to 2 and my code finially work.
So it seems that if the watermark is larger than 3, the FIFO will never receive enough data, no matter what setup I used in config tool.
I change the watermark and SAMPLE_COUNT in the example and it stops working as well.
Did I miss something in the ADC configuration? I don't think this fifo cannot hold more than 3 words. I found FIFOSIZE in the UM and compared with the register, I can confirm that the fifo size of the example and my code is 4. Maybe this is the reason of all the issues but I didn't find the place to change it in the config tool.

What do you think?