LPC55S69 : Power consumption in active mode, table 16.

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LPC55S69 : Power consumption in active mode, table 16.

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EugeneHiihtaja
Senior Contributor I

Hi !

1.

in DS Table 16. , exists notice [5] PLL enabled but it is not set for any raw in this table.

I think this is typo and should be applicable when CCLK is 100 or 150 Mhz.

2. In Table 18, in case of Powerconsumption in power-down mode, shown dependencies from amount of SRAMx RAM what is retain data.

But what about dependencies from enabled wakeup sources ?

For example if SPI3 and GINTx is enabled ?

Are any digits can be given ? Or it fit to max value ?

Regards,

Eugene

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Eugene,

From Table 15, you are right, the LPOC55S69 use PLL to generate 100MHz and 150MHz clock which are marked by [5].

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Regarding peripheral power consumption in power mode, the data sheet only gives the power consumption in active mode rather than in low power mode, because each peripheral consume less power consumption than that of on-chip SRAM.

Hope it can help you

BR

XiangJun Rong

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EugeneHiihtaja
Senior Contributor I

Hi !

Yes table 15 is correct, but table 16 is not.

br,Eugene

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Eugene,

The Table 16 does not mention the Note5, but it lists the Note5, I think it is a typo, I agree with you.

BR

XiangJun Rong

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