I'm trying to use the Windowed Watchdog Timer (WWDG/WDT) warning interrupt. Unfortunately, it uses a shared "System Interrupt" IRQ 0 with multiple sources such as the Brown-Out Detector (BOD) and likely others that I can't find in the documentation.
IRQ 0 retains it's pending state in the NVIC despite clearing it and despite the WWDG nor BOD raising an interrupt flag. Even with these peripherals entirely disabled IRQ 0 remains pending after clear.
What else can cause this? Where is it documented what sources share IRQ 0?
I have found no answers in the datasheet or reference manual. Specifically table 13 Interrupt Vector Assignments does not list any other sources.
I did find a hint towards Flash on line 85 of LPC5536.h: "CMSIS Peripheral Access Layer for LPC5536" rev. 1.1:
WDT_BOD_IRQn = 0, /**< Windowed watchdog timer, Brownout detect, Flash interrupt */
ARM documentation for the M33 core list this vector as a "System" interrupt without much details. I assume this is because the integrator, NXP, decides what sources are connected here.
