LPC5536 ISP pin state

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LPC5536 ISP pin state

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KeesWe
Contributor I

Hi,

The function of the ISP0 pin of the LPC5536 and LPC5528-LPC5569 are inverted according to manuals.

The LPC5528 and 69 ISP0 pin must be high to boot from internal flash.
The LPC5536 ISP0 pin must be low to boot from internal flash.

Can someone confirm that this is correct ?

 

Kees

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1 Solution
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Pavel_Hernandez
NXP TechSupport
NXP TechSupport

Hello, my name is Pavel, and I will be supporting your case, I reviewed the schematic and the RM, and I seems the LPC55s36 has a misspelling part about the ISP, but the other LPC's seems good. 

Spoiler
LPC55s28 / LPC55s69
The P0_5 means the signals go into that pin, logical IDLE 1.
Pavel_Hernandez_0-1709927439741.pngPavel_Hernandez_4-1709927511742.png

LPC55s36

There is something wrong about the RM.

Pavel_Hernandez_2-1709927492696.png
Pavel_Hernandez_3-1709927499115.png

Thanks for tell us about this misspelled I will do a report.

Let me know if you have more doubts.

Best regards,
Pavel

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503 Views
Pavel_Hernandez
NXP TechSupport
NXP TechSupport

Hello, my name is Pavel, and I will be supporting your case, I reviewed the schematic and the RM, and I seems the LPC55s36 has a misspelling part about the ISP, but the other LPC's seems good. 

Spoiler
LPC55s28 / LPC55s69
The P0_5 means the signals go into that pin, logical IDLE 1.
Pavel_Hernandez_0-1709927439741.pngPavel_Hernandez_4-1709927511742.png

LPC55s36

There is something wrong about the RM.

Pavel_Hernandez_2-1709927492696.png
Pavel_Hernandez_3-1709927499115.png

Thanks for tell us about this misspelled I will do a report.

Let me know if you have more doubts.

Best regards,
Pavel

466 Views
KeesWe
Contributor I

Hi Pavel,

Thank you for your answer.

So I will use the same table as used for the LPC5528 and others for the ISP0 signal.

Regards, Kees

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