Hi,
the documentation for the Ethernet peripheral in UM10912 is not correct.
On page 825 (rev 2.3 - 17 June 2016) the DMA interrupt enable register shows:
Am I correct inassuming that "abnormal interrupt summary enable (bit 16 in this register)" should read "normal interrupt summary enable (bit 15 in this register)"
and am I also correct in assuming that the bits 14 and 15 are sort of masking the complete group of abnormal and normal interrupts so bit 15 should always be 1 for any of the normal interrupts to fire?
Regards,
Rob
Hi robjansen,
I think you're right, I will inform about this issue. Thanks a lot for your feedback.
Best Regards,
Alexis Andalon