Hi, 奥山,
Pls refer to the Table 21 in data sheet of LPC5460x.pdf, the high/low logic voltage is dependent on VDD voltage.
Note that the internal Reset signal are driven by POR(Power On Reset), External Reset pin, BOD,watchdog....., the rising edge of the external Reset pad does not means that the first instruction is executed immediately, you have to consider the POR reset.
Hope it can help you
BR
XiangJun Rong
