Hi, Alice, thanks for your reply but I am afraid that demo isn't helpful for us. We are currently able to do XIP but our problem is specifically that we cannot do an Erase/Write within another partition of the same physical flash while we are XIP from that same flash part.
I am now exploring if we can execute our code from Board SDRAM which will then allow us to manipulate the SPI Flash while in application.
I think this example does cover some of what we need to accomplish. However, our code is too large to fit into SRAMX. I think we need to be able to execute from Board_SDRAM. Is there any example code available for that?
I found document AN12423 but I haven't had success trying to follow it yet. Possibly because of section 2.3 of that document. It was unclear to me exactly where those code changes for the MPU needed to be made.
Hello @mitchkapa
About MPU configuration, please refer to <Arm®v7-M Architecture Reference Manual> -> B3.5.7 MPU Region Number Register, MPU_RNR, you can download from Arm website, I also attached it for you.
BR
Alice