LPC54018 IoT with SPIFI code in XIP bricks board. Cannot debug!

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LPC54018 IoT with SPIFI code in XIP bricks board. Cannot debug!

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stuartrubin
Contributor III

I am developing code which uses the SPIFI drivers to send commands to a flash device. The code must also run XIP. (I understand that this is problematic as code is being fetched from flash while I am simultaneously talking to the flash. I'm trying to work around that.)

I have programmed some code into flash which changes the flash controller (SPIFI), which subsequently crashes the program and hangs things up completely. Because the code is XIP, whenever I power-up the board, this code runs immediately.

The problem is that the code is preventing the debugger from working. I have tried both the LPC-Link 2 and Segger J-Link and they both have the same problem; the debugger cannot halt, or reset, or otherwise attach to the target. (See the debugger output listed below.)

So, how can I force the device to NOT run XIP, or at least keep it in a state where the debugger can connect and reprogram the flash?

I have tried to explicitly erase the flash, but I get the same problem. The debuggers / programmer cannot halt the target and connect.

Thank you!

------------------------------------------------------------------

Here is the output from degugger:

Could not connect to target.
SEGGER J-Link GDB Server V6.32b Command Line Version
JLinkARM.dll V6.32b (DLL compiled May 8 2018 18:26:33)
Command line: -nosilent -swoport 2332 -select USB=50116274 -telnetport 2333 -singlerun -endian little -noir -speed auto -port 2331 -vd -device LPC54018 -if SWD -halt -reportuseraction
-----GDB Server start settings-----
GDBInit file: none
GDB Server Listening port: 2331
SWO raw output listening port: 2332
Terminal I/O port: 2333
Accept remote connection: localhost only
Generate logfile: off
Verify download: on
Init regs on start: off
Silent mode: off
Single run mode: on
Target connection timeout: 0 ms
------J-Link related settings------
J-Link Host interface: USB
J-Link script: none
J-Link settings file: none
------Target related settings------
Target device: LPC54018
Target interface: SWD
Target interface speed: auto
Target endian: little
Connecting to J-Link...
J-Link is connected.
Device "LPC54018" selected.
Firmware: J-Link V10 compiled Apr 20 2018 16:47:09
Hardware: V10.10
S/N: 50116274
Feature(s): GDB
Checking target voltage...
Target voltage: 3.36 V
Listening on TCP/IP port 2331
Connecting to target...Found SW-DP with ID 0x2BA01477
Scanning AP map to find all available APs
AP[1]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x24770011)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FF000
CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
Found Cortex-M4 r0p1, Little endian.
FPUnit: 6 code (BP) slots and 2 literal slots
CoreSight components:
ROMTbl[0] @ E00FF000
ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7
ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 003BB002 DWT
ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 002BB003 FPB
ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 003BB001 ITM
ROMTbl[0][4]: E0040000, CID: B105900D, PID: 000BB9A1 TPIU
ROMTbl[0][5]: E0041000, CID: B105900D, PID: 000BB925 ETM
Found SW-DP with ID 0x2BA01477
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FF000
CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
Found Cortex-M4 r0p1, Little endian.
FPUnit: 6 code (BP) slots and 2 literal slots
CoreSight components:
ROMTbl[0] @ E00FF000
ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7
ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 003BB002 DWT
ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 002BB003 FPB
ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 003BB001 ITM
ROMTbl[0][4]: E0040000, CID: B105900D, PID: 000BB9A1 TPIU
ROMTbl[0][5]: E0041000, CID: B105900D, PID: 000BB925 ETM
WARNING: CPU could not be halted
Halting target device failed. Trying again with reset
Failed to halt core before reset
WARNING: CPU could not be halted
Failed to halt target device on connect
ERROR: Could not connect to target.
Target connection failed. GDBServer will be closed...Restoring target state and closing J-Link connection...
Shutting down...
Could not connect to target.
Please check power, connection and settings.

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jeremyzhou
NXP Employee
NXP Employee

Hi Stuart Rubin,

Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
1. how can I force the device to NOT run XIP, or at least keep it in a state where the debugger can connect and reprogram the flash?
-- You can program and debug the demo in the RAM, however, it's necessary to adapt the linker file to make it.
I'd highly recommend you to refer to demos in the SDK library which contains a variety kind of demos for debugging.
Have a great day,
TIC

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stuartrubin
Contributor III

Jeremtzhou, thank you for your response. Unfortunately, the debugger cannot reset and halt the processor at all, so I cannot put a program into RAM.

I believe the only practical solution is connecting the module to a “baseboard” OM4006, the starting the board in ISP mode (pressing SW4). This cannot be done with the module alone without modifying the hardware. I have ordered the baseboard which should arrive today to confirm.

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brendonslade
NXP TechSupport
NXP TechSupport

The LPC540xx boot ROM will attempt to execute code from flash by default, and if the image found in flash is not valid then the ROM will disable debug and hence you cannot connect. However it can be forced into ISP (in-System Programming) mode by pulling the ISP pins high or low, using the buttons available on the OM40006 or (much cheaper) OM40008 baseboards. The boot ROM samples these pins shortly after reset to determine what to do. There are various ISP modes (including UART/SPI/I2c and USB modes) that are defined by combination of the 3 ISP pins, but basically these allow you to program the device using one of the serial interfaces - see the chip User Manual for full details about device booting.

One other thing you can try is to mass erase the flash. The debug system might be able to get enough access to do this, although, depending on the code/data that is in the flash, this might not be possible. In MCUXpresso IDE you can use the GUI flash tool (the icon that looks like a chip on the tool bar, right next to the restart button). With your module connected, click on this button; if the tool is able to connect to your board then click on the Erase tab under the Target Operation section then select Mass Erase and click Run.

Even if you cannot fix your debug connection problems using Mass Erase, it is a useful way to clean things up when the flash content is messed up after you've "recovered" using ISP mode.

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stuartrubin
Contributor III

Brendon, thank you. In fact I'm now doing what you suggested. I typically use the baseboard's buttons to temporarily change the boot mood. 

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