INitial customer email:
We are trying to program LPC51U68 from i.MX8M via ISP over SPI, but can't get a proper response from the LPC51U68 chip. The manual states that the LPC will drive the ISP1 pin to low state after receiving the SH_CMD_PROBE (0xA5) command. We send the following byte sequence to the
chip: 0xA5 0x01 0x00 0x00 0x00 0x00 0x00 0xA4. We observe that ISP1 becomes high and never switches to low. We observe that ISP1 doesn't change its state if the probe command is incorrectly formed. This makes us think that the LPC receives and handles the command, but its state after that is unclear.
What can be the cause of this issue? Does NXP have a reference code for ISP over SPI?
My initial response:
I already checked with the customer to make sure that it has both isp0 and isp1 pull low at POR to initiate isp mode via spi/i2c.
In addition I also checked that they have pull down (4.7k) on isp1.
Attached is the email chain from the customer.
Please advise whether we can test isp functionality on our lpc51u68 via spi.
Thanks for helping me resolved this issue.Please update the UM at your earliest convenience.
I just want to add the comment below so it can help other customers who read this blog later on:
As it turned out that the UM for the LPC5u68 is wrong.
0xA5 0x01 0x00 0x00 0x00 0x00 0x00 0xA4.
When we apply the sequence for the LPC54608, the chip responded with an interrupt set low as shown in the screen capture above.
0xA5 0x04 0x00 0x00 0x00 0x00 0x00 0xA1