Hi,
I suppose that you use interrupt mode to write data to SPI transmit register and read from SPI receiver register.
I suppose that the CPU is overloaded, because the SPI ISR triggering frequency is too fast for cpu to handle.
You can use FIFO mode, set the watermark level to a large value. In the ISR, check the FIFO level, write multiple data to transmit FIFO, read multiple data from receiver FIFO. In this way, the CPU load can be reduced.
Hope it can help you
BR
XiangJun rong