LPC43S57 SPI2 Max frequency is limited to 7Mhz

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LPC43S57 SPI2 Max frequency is limited to 7Mhz

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Punithintelli
Contributor I

Hello All,

I am trying to use the SPI2 on LPC43S57 and when ever I try to configure the SPI speed more than the 7Mhz the SPI interrupt handler itself is not getting triggered. If I configure below 7Mhz it works fine.

The core clock is configured at 204Mhz.

Could any one help me out on this.

Thanks

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Punithintelli
Contributor I

Hi XiangJun rong,

I am using the SPI peripheral in LPC43S57 with Keil IDE. I don't have any option to set the FIFO mode. But when we used SSP0 on the same pins as SPI, It worked fine and I was able to set more than 25Mhz as specified in the data sheet. Whereas for SPI peripheral, the data sheet says we can go all the way up to 25Mhz but I am not able to achieve this.

Thanks,

Punith P

 

 

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

As you know that that the interrupt mode takes a lot of time to push/pop registers, jump/exit to ISR, so the entering/exiting interrupt frequency can not be high. If you use FIFO mode, which can reduce interrupt frequency.

But the SPI module of LPC43S57 does not support FIFO mode, does not support DMA mode either.

Sorry for not helping you

BR

XiangJun Rong

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1,819 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

I suppose that you use interrupt mode to write data to SPI transmit register and read from SPI receiver register.

I suppose that the CPU is overloaded, because the SPI ISR triggering frequency is too fast for cpu to handle.

You can use FIFO mode,  set the watermark level to a large value. In the ISR, check the FIFO level, write multiple data to transmit FIFO, read multiple data from receiver FIFO. In this way, the CPU load can be reduced.

Hope it can help you

BR

XiangJun rong

 

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1,774 Views
Punithintelli
Contributor I

Hi XiangJun rong,

Any update on the above Issue.

Thanks,

Punith P

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