LPC4370 HSADC+DMA

[ALOONG]

I am currently having a strange problem with HSADC+DMA and can't find the reason: After I initialize HSADC and DMA, the software starts HSADC, for example, I collect 2048 data, the DMA interrupt time is about 25.6us in theory, but the time of the first DMA interrupt reached about 31.5us, I set the flag bit in the DMA interrupt, after completing a DMA transaction. The main loop judgment flag in the main function opens the next DMA and HSADC data collection, from the second collection, each DMA interrupt time is the normal 25.6us. Check the value of the register before and after two times, there is no change, can not find the root cause is what, do you know the brother, hope to get your help, thank you!

[pamela870]

Hello,

You've hit a common snag in the world of embedded systems development, where licensing and tool access can be complex. Let's break down the situation and outline the process you need to follow:

The Core Issue: Separated Licensing & Distribution

Qualcomm S7 License:
This grants you the right to use Qualcomm's Snapdragon S7 platform, which incorporates Tensilica DSP cores.
It's a license for the hardware and associated Qualcomm software.
Tensilica Tools (Cadence):
These are the software development tools (compilers, debuggers, simulators) specifically for the Tensilica DSPs.
Cadence, the owner of Tensilica, often maintains separate control over these tools.
This seperation is done because the tools can be used in many different platforms, not just qualcomm ones.
The Disconnect:
Your Qualcomm license doesn't automatically grant you access to Cadence's Tensilica tools.
This is due to licensing agreements and distribution strategies between Qualcomm and Cadence.
Why the Separate Application?

Licensing Agreements:
Qualcomm licenses the Tensilica IP for use within their chips, but they don't necessarily distribute the Tensilica tools themselves.
Cadence retains control over tool distribution to manage support, updates, and licensing compliance.
Support and Maintenance:
Cadence wants to ensure that users of their tools receive proper support and updates.
By managing distribution, they can control who gets access and provide tailored assistance.
Toolchain Customization:
The Tensilica cores within Qualcomm's S7 might be customized, requiring specific toolchain configurations.
Cadence may provide specialized tools or versions tailored to Qualcomm's implementation.
Export Controls:
Development tools, especially compilers and debuggers, can fall under export control regulations.
Cadence needs to ensure compliance with these regulations when distributing their tools.


Best Regards
e-zpassnj

[Harry_Zhang]

Hi @ALOONG 

You can manually trigger the first conversion without DMA, then enable DMA for subsequent transfers.

Measure the time from enabling HSADC to the first conversion completion manually to see if the delay is from HSADC or DMA.

BR

Harry