Hello, in my journey to getting DMA and ADCHS to work on the LPC4370, I have discovered that the sample rate seems to be 40 samples per second.
I am injecting a sawtooth signal at 4 hz into ADCHS_0. The number of samples between cycles of the signal is roughly 10. This works out to 40 samples per second. Far lower than it should be. I have tried with the ADCHS clock to both 100kHz and 80MHz with the same results.
Please review my complete code attached as well as the gpdma files that include the entries for ADCHS are missing from the SDK.
Why am I only getting 40 samples per second?
Solved! Go to Solution.
I have determined that my method of measuring the sample rate is flawed. Firstly, I was printing the values of FIFO_OUTPUT[i]. When FIFO_OUTPUT[0] is read, the values get shifted. I don't know what happens when reading the other FIFO_OUTPUT registers.
Secondly, the ADC was still running while printing and in the IRQ Handler. Both of these prevent the ability to accurately gather the values and determine the sample rate.
Changing my code to have the ADC stop after 16 samples and printing out the value of FIFIO_OUTPUT[0] 16 times results in expected behavior.
I have determined that my method of measuring the sample rate is flawed. Firstly, I was printing the values of FIFO_OUTPUT[i]. When FIFO_OUTPUT[0] is read, the values get shifted. I don't know what happens when reading the other FIFO_OUTPUT registers.
Secondly, the ADC was still running while printing and in the IRQ Handler. Both of these prevent the ability to accurately gather the values and determine the sample rate.
Changing my code to have the ADC stop after 16 samples and printing out the value of FIFIO_OUTPUT[0] 16 times results in expected behavior.
Hi,
I just have reviewed your code, you use software trigger to trigger ADC to sample, but I do not find the timer which can trigger ADC periodically.
You have to use a Timer for example CTimer to generate interrupt, in the CTimer ISR, clear CTimer flag and add the line:
Chip_HSADC_SWTrigger(LPC_ADCHS);
which will trigger ADC to sample with the CTimer period.
Hope it can help you
BR
XiangJun Rong
Thank you for reviewing my code and responding so quickly.
I respectfully disagree. Because there is only one descriptor and HSADC_DESC_BRANCH_FIRST is set, the descriptor is reloaded upon completion. This works. Only an initial software trigger must be used. After that, the HSADC runs indefinitely. There is no doubt about this. I have no problems with fetching samples. If I did, I would have mentioned it in my post. The only problem I have is that rate at which the samples are taken. 40Hz.