LPC4337 IAP Flash Programming

[lpcware]

Content originally posted in LPCWare by v0ynich on Wed Feb 25 14:16:32 MST 2015
Hello!

I have the following problem:

By using my own bootloader, I'm able to program the LPC4337 flash.
However, in a ~45kByte code, there is almost always one page (512Bytes) missing. This page is still with all bytes -> 0xFF.
I'm 100% sure I'm not writing this page full of 0xFF.
The location of this page (is always 512byte aligned) is random (even if a reset everything before each new flashing procedure).
The pages before and after the missing one are correct.

What I do:

-> I do init IAP
-> I do disable the interrupts using __asm volatile ("cpsid i");
-> I do prepare for writing operations before erase
-> I do erase
-> I do a blank check operation
-> I do prepare for writing operations before write
-> I do write (copy ram to flash)
-> I do compare after writing

No error is reported.

If I use a low frequency clock (1000 Khz) as argument for the write operation, the compare fails as expected (there's no enough time for the flash  programming). At this momment I'm setting it as 96000 Khz (not sure if this is the correct value after reset).

When programming a ~4KBytes code, most of the time this missing page is not noticed. It seams it needs a bunch of pages writes to have at least one missing page.

What I think it's happening:
The copy ram to flash operation returns "COMMAND OK" but in fact some error occured.

Any hints ??

Thank you!

[lpcware]

Content originally posted in LPCWare by v0ynich on Thu Feb 26 11:19:33 MST 2015
Hello!

I've read the example and nothing rings me a bell about what am I doing wrong.
I found that the pages are correclty written, but the following writes to the subsequent pages may perturb the last ones..

When I perform a "prepare to write", I'm only preparing the sector I'm working with at that moment.

Any idea?

Thank you

[lpcware]

Content originally posted in LPCWare by lpcxpresso-support on Thu Feb 26 07:03:02 MST 2015
There is a working example provided in LPCOpen for the LPC4300 family. I suggest that you read and understand that example.

[definium]

Except the LPC4337 LPCOpen IAP example does not work. For me it hangs in the ROM code unless I run under debugger control. See my post on this subject.
As far as I can tell, the flash signature part of the example could never have been tested. It generates a hard fault as the register struct pointer definition is just wrong.

[lpcware]

Content originally posted in LPCWare by v0ynich on Thu Feb 26 06:52:41 MST 2015
Thank you for your response

After changing the argument from 96000 to 12000 the "compare" command returns "compare_error" right after the first page. After dumping the flash, I can confirm the first page is indeed badly programmed. Some of the words are wrong.

Am I supposed to perform the "init" command only one time or every time I do a "prepare to write" ?
I tried both ways and noticed exactly the same behaviour.


Thank you


EDIT:

After making sure the clock is 12 Mhz by using the following code:

    iap_regtmp  = *((uint32_t *)0x4005006C);
    iap_regtmp &= 0xE0FFF7FE;
    iap_regtmp |= 0x01000000;

     *((uint32_t *)0x4005006C) = iap_regtmp;
     *((uint32_t *)0x40050044) |= 0x00000001;

and setting the write, erase, etc,, argument as 12000, the whole process behaves as described in the first post...

Ideas?

Thanks

[lpcware]

Content originally posted in LPCWare by TheFallGuy on Wed Feb 25 22:49:03 MST 2015
After booting, the clock is running at 12Mhz - not 96. That is most likely the cause of your problem.