Hello Victor,
thank you for the fast response. We considered the debug pins design rules given in UM for LPC43xx. As the chapter "51.6.2 Cortex debug connector (10-pin)" shows (fig. 193), we implemented those two pull-ups. Also we've put a 47k to RESET pin, so that we're sure that the reset must actively be driven low. The difference to the page you've given is that the UM doesn't suggest any R for SWCLK.
Considering the link to debug access points: I use
- no low power mode
- no watchdog
- no debug pins (the're left at default mode)
in the firmware.
The thing with the incorrect clock: why some boards start well and others don't?
The reason why we put resistors in serial and additional protection diodes is: on our first board after a couple of debug sessions and discovering the MCU not be debuggable, we've measured the resistance of the chip at the SWD pins and they were at low resistance. But the MCU worked well and could be reprogrammed through ISP UART with FlashMagic.
So, unfortunately, those links are not helpful. Have you had any similar case? The MCU exists since a very long time on the market, so I'm pretty sure, that if I'm not the first one with such a problem, there're other requests of this art, aren't they?
Regards,
Yaroslav