LPC4088FET180 I2C1 pins - input impedance and current sinking when micro not powered

[longboard]

Hello, 

I am using an LPC4088FET180 micro on a single board computer (SBC) design. This board also incorporates an RTC chip. This chip uses a 3.0V coin cell for backup power when power is removed to the SBC. The I2C clock and data lines are pulled high through external 4.75k Ohm resistors.

I am trying to determine if there is a spec for the LPC4088FET180's I2C1 clock and data pins input impedance or ability to sink current, when power is removed from our single board computer (Vdd=0V). I think these pins should be high-Z when the LPC4088FET180 is not powered. I believe there are pull-up and/or pull-down resistors that can be present on the clock and data pins. So, I am not sure what the state of these pull-up or pull-down resistors would be on the I2C1 pins, when power is not applied to the micro (Vdd=0V). The information I can found in the datasheet related to the pull-ups or pull-downs, seems to be specific to Vdd being 3.3V. However, I am interested in knowing what the pull-up or pull-down values and states are when Vdd is 0V. I appreciate any help or information possible on this topic. 

[Harry_Zhang]

Hi @longboard 

I have checked the LPC408x/7x data sheet.

the LPC408x/7x family datasheet says the I²C pins are true open-drain and “when power is switched off, this pin connected to the I²C-bus is floating and does not disturb the I²C lines.” In other words, the pin driver itself goes high-Z when VDD = 0 V.

BR

Harry

[longboard]

Hi Harry, 

Thank you very much for pointing me to that information in the LPC408x/7x datasheet regarding the I2C bus pins state when Vdd=0V. I am glad to learn that the inputs are high-Z when Vdd=0V.

cheers,

Sean