LPC4078: using 16bit bus width external SDRAM as program memory

[otavioborges]

Hello,

I'm developing an application using LPC4078FBD208 and an Alliance AS4C4M16SA SDRAM IC as external memory. After bootup I'm going to load the program data from a SD card, write it on the external memory and switch CPU context to execute from the external memory.

As M4 instructions are 32bit, the SDRAM 16bit bus width represent a problem for this scenario? The memory max clock is 144MHz, therefore I'll need two clock cycles (assuming that MCU core clock will be 120MHz) to fetch an entire instruction through EMC, will I have to reduce the CPU core clock to 60MHz to work with this setup?

Thank you.

[carstengroen]

According to the users manual, the max EMC clock (I'm not 100% sure, but I read the "dynamic EMC timing" that Tmin is 12.5 nSec) is 80 MHz. I think you will have to set the EMC clock divider to 2 to get 60 MHz for the EMC if runinng the CPU at 120 MHz?  

[jeremyzhou]

Hi Otavio Borges ,

Thank you for your interest in NXP Semiconductor products and 

for the opportunity to serve you.

As M4 instructions are 32bit, the SDRAM 16bit bus width represent a problem for this scenario? The memory max clock is 144MHz, therefore I'll need two clock cycles (assuming that MCU core clock will be 120MHz) to fetch an entire instruction through EMC, will I have to reduce the CPU core clock to 60MHz to work with this setup?

-- I don't think so.

Have a great day,

TIC

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