LPC3250 BOOT ISSUE AT NEGATIVE TEMPERATURE

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LPC3250 BOOT ISSUE AT NEGATIVE TEMPERATURE

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shamanthshetty
Contributor I

We are using a NXP processor, LPC3250 in one of our products. We are facing few difficulties during production stage. 

Problem:  We have designed our product to work over temperature from -40 to +70 deg C. During production, few of the boards are not coming up (getting hung) when powered at negative temperature (between -20 to-40 deg C).  We are booting LPC3250 using a Flash memory and runtime code is accessed from mDDR memory. The part number of Flash is S29GL128S11DHIV20 from Spansion and the part number of mobile-DDR is IS43LR16800F-6BLI from ISSI. We have incorporated all the recommendations in the Errata sheet of LPC3250.  I am attaching a report on the tests done here to debug this issue. 

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shamanthshetty
Contributor I

Hi Carlos,

Please suggest any alternate (if any) buffer IC (alternate to 74LVC1G126) which has large propagation time and enable time.

regards,

Shamanth

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shamanthshetty
Contributor I

Hi Carlos,

As I mentioned earlier ,we are at production phase now and hence "different boot approach workaround" is ruled out.

  • We  tried with different capacitor values (1uF,10uF, and 20uF ) at CKE pin to ground but  boot fail issue still observed.
  • I am not clear with   "Reduce the value of the 4K7 resistor in order to match your board impedance" statement.               I assume 4k7 act as a pull up resistor which is  selected as per DC characteristics of  buffer and DDR IC.               

regards,

Shamanth

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shamanthshetty
Contributor I

Hello Carlos,

We have already tested the hardware without DDR device .No boot issues found in such platform.

Here we didn't removed the DDR device physically from the PCB board instead we  didn't initialize and activate

the DDR device in software. This confirm no issue in our hardware.

As per NXP application note "AN10931"

"To clear the drive condition, the SDRAM device needs a few clocks with the SDRAM
clock enable signal active" and you have proposed workaround solution.Same workaround we have implemented in the design.

My worry here is -the propagation delay and enable time of buffer device(P/N:74LVC1G126)  decides the clock enable time . But it will vary from 1ns to 10ns over temperature and sample to sample causing booting failure

pastedImage_1.png

We are stuck at production build due to this major failure in workaround you have proposed. Hope we get good resolution from your end soon.

regards,

Shamanth

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CarlosCasillas
NXP Employee
NXP Employee

Hi,

Unfortunately, AE team have commented that no any other workaround is available besides the two purposed on AN10931. So, could you please confirm if you already tried with both, or what is the current status of this situation?

Additionally, could you please mention if you are in contact with any FAE/Sales person?

Hope this will be useful for you.

Best regards!

/Carlos

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shamanthshetty
Contributor I

Hi,

We are using workaround proposed Fig 1 of AN10931(Rev_01). No other hardware  work around I found in the same application note. Please clarify?

regards,

Shamanth

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CarlosCasillas
NXP Employee
NXP Employee

Hi Shamanth,

After confirming on the application note, the other “workaround” is using a different boot method. So, if it is not possible in your design, Fig 1 is the only solution. If it is not solving the issue right now, it may require some adjustments for your specific design. You could try the following:

  • Adding a capacitor between CKE pin and GND in order to increment the delay of the reset signal.
  • Reduce the value of the 4K7 resistor in order to match your board impedance.


Hope this will be useful for you.
Best regards!
/Carlos
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shamanthshetty
Contributor I

Thanks. We are observing this behavior in room temperature also. This issue  not limited to cold temperature now.

It takes bit more time to replicate in room temperature compared to cold.

Hope I will get the resolution soon from your team.

Thanks &Regards,

Shamanth

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CarlosCasillas
NXP Employee
NXP Employee

Hi Shamanth,

According with AE team and based on your document, you may try to test it as below:

  1. Remove DDR RAM, then to reboot it and observe the result. It is possible DDR holds some EMC signals.
  2. Check the PCB board, confirm the hardware is OK.


Hope this will be useful for you.
Best regards!
/Carlos
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CarlosCasillas
NXP Employee
NXP Employee

Hi Shamanth,

I have internally escalated your issue, in order to verify the low temperature behavior. I will send you an update as soon as having news.


Hope this will be useful for you.
Best regards!
/Carlos

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