LPC18xx refresh time

[setoh_waituck]

Hi all,

hope you can help.

I'm using LPC18xx with MT48LC4M32B2P-6A IT

re the following

/* Keil SDRAM timing and chip Config */
STATIC const IP_EMC_DYN_CONFIG_T MT48LC4M32_config = {
     EMC_NANOSECOND(64000000 / 4096),     /* Row refresh time */

since for automotive part,  the datasheet has indicated trefAT 16 ms max compared with tref 64ms for other options.

https://www.micron.com/parts/dram/sdram/mt48lc4m32b2b5-6a-it

Q.  should the calculation be changed as follows?

EMC_NANOSECOND(256000000 / 4096),     /* Row refresh time */

thanks and rgds,  setoh.

[jeremyzhou]

Hi wt setoh,

Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
According to the datasheet, the 128Mb SDRAM requires 4096 refresh cycles every 64ms (commercial and
industrial) or 16ms (automotive). About your question, the refresh timer value should be configured as below when using the automotive version.

EMC_NANOSECOND(16000000 / 4096),     /* Row refresh time */

Have a great day,
TIC

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[setoh_waituck]

Hi Jeremy,

Thanks for the advice.

rgds,  setoh.