LPC1857 Performance

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LPC1857 Performance

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by nesrine on Fri Feb 13 07:27:40 MST 2015
Hi,
I work with MCB1857 KEIL eval board, and i use µvision V5.13.0.0
I do the portage of the coreMark in the LPC1857 architecture;
My problem that in my project i have difficulties to decrease frequency and to manipulate flash acceleration  because it is the first one that i use NXP product,
Please find Attached my project and help me to configure my LPC in different frequency:

I think taht in the projct I should modify this function but haw i modify it in order to have differents frequency

/* Set up and initialize clocking prior to call to main */
void Board_SetupClocking(void)
{
int i;

/* Setup FLASH acceleration to target clock rate prior to clock switch */
Chip_CREG_SetFlashAcceleration(MAX_CLOCK_FREQ);

Chip_SetupCoreClock(CLKIN_CRYSTAL, MAX_CLOCK_FREQ, true);

/* Setup system base clocks and initial states. This won't enable and
   disable individual clocks, but sets up the base clock sources for
   each individual peripheral clock. */
for (i = 0; i < (sizeof(InitClkStates) / sizeof(InitClkStates[0])); i++) {
Chip_Clock_SetBaseClock(InitClkStates.clk, InitClkStates.clkin,
InitClkStates.autoblock_enab, InitClkStates.powerdn);
}

/* Reset and enable 32Khz oscillator */
LPC_CREG->CREG0 &= ~((1 << 3) | (1 << 2));
LPC_CREG->CREG0 |= (1 << 1) | (1 << 0);

/* Setup a divider E for main PLL clock switch SPIFI clock to that divider.
   Divide rate is based on CPU speed and speed of SPI FLASH part. */
#if (MAX_CLOCK_FREQ > 180000000)
Chip_Clock_SetDivider(CLK_IDIV_E, CLKIN_MAINPLL, 5);
#else
Chip_Clock_SetDivider(CLK_IDIV_E, CLKIN_MAINPLL, 4);
#endif
Chip_Clock_SetBaseClock(CLK_BASE_SPIFI, CLKIN_IDIVE, true, false);

/* LCD with HX8347-D LCD Controller                                         */
/* Attach main PLL clock to divider C with a divider of 2 */
Chip_Clock_SetDivider(CLK_IDIV_C, CLKIN_MAINPLL, 2);
}

Thank you
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by nesrine on Sat Feb 14 05:59:58 MST 2015
Hi
I should test all core frequency  in order to have all coremark score
FLASHTIM_20MHZ_CPU = 0,
FLASHTIM_40MHZ_CPU = 1,
FLASHTIM_60MHZ_CPU = 2,
FLASHTIM_80MHZ_CPU = 3,
FLASHTIM_100MHZ_CPU = 4,
FLASHTIM_120MHZ_CPU = 5,
FLASHTIM_150MHZ_CPU = 6,
FLASHTIM_170MHZ_CPU = 7,
FLASHTIM_190MHZ_CPU = 8,

So when i change the CLKIN_CRYSTAL in   this function :Chip_SetupCoreClock(CLKIN_CRYSTAL, MAX_CLOCK_FREQ, true);i can change the PLL INPUT and have the best frequency?

Reagrs
Nesrine
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by nerd herd on Fri Feb 13 10:38:00 MST 2015
Hi nesrine,

The input to the PLL is 12 MHz. When you pick a target frequency of 160 MHz, the PLL will do its best to reach your target frequency by multiplying and dividing the input frequency (12 MHz). The reason why the frequency you are operating is at 156 MHz is because 156 MHz is a multiple of 12 MHz. Is there any specific reason why you picked 160 MHz?
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by nesrine on Fri Feb 13 08:49:09 MST 2015
Hi
Thank you for the response,
but for example when I put in the MAX_CLOCK_FREQ=160000000,when i debug i found 156000000 in the systemCoreClock variable !!!
Regards
Nesrine.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by nerd herd on Fri Feb 13 08:20:00 MST 2015
Hi nesrine,

To change the MCU clock speed on startup, you will need to modify the "MAX_CLOCK_FREQ" macro which is defined on line 68 of clock_18xx_43xx.h. Remember to recompile the libraries to see this change take effect.

The flash wait states should be lowered based on the frequency you are in automatically in Board_SetupClocking(). Keep in mind that you can not make set the flash wait states to 0 at any frequency. Please follow Table 91 (in Chapter 9) of the user's manual:

http://www.nxp.com/documents/user_manual/UM10430.pdf
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