Content originally posted in LPCWare by MikeSimmonds on Fri Jan 23 03:38:24 MST 2015
Firstly: DO NOT post the SAME question multiple time or in multiple forums!!!
Otherwise people will think you are an idiot and won't answer (more than once at least).
You clearly need to do some research on memory interfacing.
The Data lines and the address lines are shared between the 4 static ram ranges AND the 4 dynamic ram ranges.
As are some of the control lines (such as WE); Others are either for static rams or for dynamic rams.
Although addr/data/control go to both sets of memory chips in parallel, they ony take effect if the chip select
for the chips is active. That is why the various CS pins have different address ranges assigned.
Also BEWARE blindly connecting the addr lines to dynamic memory. They are not really address lines, but
row, column, bank selectors.
Read the UM10470 EMC chapter very very carefully! Read the SDRAM datasheet carefully.
Download schematics of example boards from Keil, EA websites. See also AN10771. [Applies to 1778/1788 too.]
I include a memory schematic. This uses a 16-bit static ram. Just drop D8-D16 and the higher order Addr lines.
There are sample layouts in the UM for static ram.
Regards, Mike