LPC1788 GPDMA Transfer size

[lpcware]

Content originally posted in LPCWare by wella-tabor on Thu May 09 05:53:59 MST 2013
Hello,

does anybody know what is the meaning of the (bits)11:0 TRANSFERSIZE field in the DMA Channel Control registers?
Should it be number of transfers with a width DWIDTH => number of transfered bytes = (2^DWIDTH) * TRANSFERSIZE?

It is not clear for me from the user manual v2.1. From PDL's DMA example it seems to be number of transfers, not bytes. I did not read ARM PL081 and I am trying to avoid this...

Thank you for any hints

Best
Martin

[lpcware]

Content originally posted in LPCWare by wella-tabor on Thu May 09 06:05:49 MST 2013

Ok, I should read it :)

[from the ARM site]

Scenario (1)

In the case where the DMAC is the flow controller, if I set Burst size (same for both source and destination) to 128 and width is word, then, should I set TransferSize to 512 i.e. 128*4, bytes or 128 (items of burst)?

Answer (1) The TransferSize is the number of transfers to perform when the DMAC is the flow controller. So, in your example, the TransferSize is 128; the total number of bytes transferred will be 128 x 4 = 512