LPC1778 PULL-UP

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 
3,185件の閲覧回数
yukinobuhori
Contributor II

P0 [24] to P0 [28] of LPC 1778,
P2 [8] P2 [9] P2 [11] to P2 [13],
I want to set PULL-UP for P5 [1] to P5 [3]. . .
P0 [26], P2 [8], P2 [9], P5 [1] are OK.
Others are NG.
If an external resistor (10 KΩ) is connected to P5 [2], P5 [3]
It is confirmed that the operation is OK.
If possible, GOOD is better without external resistance.

1 解決策
3,088件の閲覧回数
kerryzhou
NXP TechSupport
NXP TechSupport

Hi Yukinobu Hori,

 1. P5[2] and p5[3] is the open drain 5V tolerant pin, it needs an external pull up to provide output functionality, you can find it from the datasheet.

pastedImage_1.png

pastedImage_2.png

2. P0[27], P0[28] is also the open drain pin.

pastedImage_3.png

pastedImage_4.png

3. But, P0[24], P0[25], P2[11],P2[12],P2[13] and P5[1] in default, it enables the PU,

pastedImage_5.png

But it is the input function in default, you need to configure it to output by yourselves.These pin's Pull up is OK, please double check it.

Wish it helps you!


Have a great day,
Kerry

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

元の投稿で解決策を見る

3 返答(返信)
3,088件の閲覧回数
yukinobuhori
Contributor II

Thank you very much. I will proceed with it as reference.
It was saved.

0 件の賞賛
返信
3,088件の閲覧回数
kerryzhou
NXP TechSupport
NXP TechSupport

You are welcome!

 If you still have question about this topic, please kindly let me know!

 If your question is solved, please help me to mark the correct answer, just to close this case, thank you!


Have a great day,
Kerry

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 件の賞賛
返信
3,089件の閲覧回数
kerryzhou
NXP TechSupport
NXP TechSupport

Hi Yukinobu Hori,

 1. P5[2] and p5[3] is the open drain 5V tolerant pin, it needs an external pull up to provide output functionality, you can find it from the datasheet.

pastedImage_1.png

pastedImage_2.png

2. P0[27], P0[28] is also the open drain pin.

pastedImage_3.png

pastedImage_4.png

3. But, P0[24], P0[25], P2[11],P2[12],P2[13] and P5[1] in default, it enables the PU,

pastedImage_5.png

But it is the input function in default, you need to configure it to output by yourselves.These pin's Pull up is OK, please double check it.

Wish it helps you!


Have a great day,
Kerry

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------