LPC1769 driving 5 V line

[lpcware]

Content originally posted in LPCWare by inspire on Mon Apr 21 05:52:59 MST 2014
Hi,

on a PCB I have the following scenario: an LPC1769 (3.3 Vdd) is connected to a signal line with 5 V through a 10 k resistor. The LPC has 5 V tolerant pins but I'm not sure if it can interact with the signal line correctly. The LPC can put a 0 V or a 3.3 V level on the sinal line. But what happens exactly?

a) In case of the 0 V level there will still be an input current of I = 5 V / 10k = 0.5 mA.
b) If the LPC puts a 3.3 V level to the signal line the 3.3 V will be pulled up with the 10 k resistor to above 3.3 V. Input current: I = (5V-3.3V)/10k = 0.17 mA

Is either of these cases a problem for the LPC? I'm afraid it might not withstand especially case b) for a long time, right? Is case a) also a problem?

Thanks!
inspire

[lpcware]

Content originally posted in LPCWare by Pacman on Mon Apr 21 14:22:44 MST 2014
As Wouter says, the LPC needs to be protected against 5V when the LPC is not powered.

If your design can afford it, you could solve this by making a voltage divider.
Just to make it clear: 3K3 between the LPC pin and the 5V device, 5K6 between the LPC pin and GND.
Resistor scaling = 1.7 : 3.3.
-I can see you know how to do the maths already. ;)

[lpcware]

Content originally posted in LPCWare by Wouter on Mon Apr 21 09:51:00 MST 2014
Hi Inspire,

Both case A and case B are no problem.
As long pin's current stays below IO[sub]H[/sub]/IO[sub]L[/sub] (=4mA) and the pin's voltage below 5V (while the LPC is powered, otherwise 3.3V), it's OK.

Also in case B the voltage on the pin is not expected to rise a lot above 3V3, probably just a few mV maximum (since the LPC is driving the pin with low-impedance, and the 5V is connected through a 10K resistor).
To avoid the 0.17mA in case B, you can also configure the pin as Open-Drain. Of course the output voltage on that pin when driven high would be 5V in that case.

Regards,
Wouter