LPC1768 SPI Test Mode

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LPC1768 SPI Test Mode

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by ddink on Tue Nov 19 09:21:07 MST 2013
Hello,

I need a continious SPI clock in master mode (running all the time, even if there's nothing  to send) for testing purposes. I like to generate this by using the SPI test mode. Therefore I added SPTCR to the LP17xx.h Cmsis library:
typedef struct
{
  __IO uint32_t SPCR;
  __I  uint32_t SPSR;
  __IO uint32_t SPDR;
  __IO uint32_t SPCCR;
  __IO uint32_t SPTCR;
       uint32_t RESERVED0[2];
  __IO uint32_t SPINT;
} LPC_SPI_TypeDef;


then I added
LPC_SPI->SPTCR = 0x0FE;

to the runtime code (after the SPI was initialized).
In the disassembly it looks as following:
 23e:f04f 0300 mov.wr3, #0
 242:f2c4 0302 movtr3, #16386; 0x4002
 246:f04f 02fe mov.wr2, #254; 0xfe
 24a:611a      strr2, [r3, #16]


All good so far, but when I run the program and read the SPTCR register, it is empty. There is also no cont. clock on the SPI Clk pin.
Are there any restritions for the testing mode or am I doing anythin wrong?

Thank you very much!

ddink
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by ddink on Thu Nov 21 01:16:56 MST 2013
Thank you very much for your reply! I tried it with 7:1 as 1 (with the following disassembly:
 23e:f04f 0300 mov.wr3, #0
 242:f2c4 0302 movtr3, #16386; 0x4002
 246:f04f 0202 mov.wr2, #2
 24a:611a      strr2, [r3, #16]

)
Still no continious clock  :~
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by cfbsoftware on Tue Nov 19 14:30:12 MST 2013
My reading of the documentation is that you should set the bitfield 7:1 to the value 1, not to set all bits 7:1 to 1.

Try LPC_SPI->SPTCR = 0x02;
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