LPC1768 GPIO Interrupt Triggers when enabled

[lpcware]

Content originally posted in LPCWare by dev2. on Tue Oct 13 01:13:34 MST 2015
Hi,

I have a requirement where I need to turn on/off GPIO interrupts during certain events in my application. Requirement is to monitor both Falling/Rising edges when this interrupt is enabled.

Each time GPIO interrupt is enabled in IO0IntEnR/IO0InENF register, I get one Rising/Falling edge interrupt trigger even though there is no transition in the input. This happens only the first time, after which interrupt works as expected.

Any pointers on what could be the reason for this behavior?

Regards,
Sam

[lpcware]

Content originally posted in LPCWare by briching on Thu Oct 15 22:48:44 MST 2015
Clearing any interrupt before enabling them for the first time is analogous to initializing it, and properly I might add.  If you don't initialize (just about everything) properly, you should expect undefined or undocumented behavior.  In your case with double edge interrupts, perhaps it is the fact that the chip defaults all of its pins to inputs with pull-up resistors on powerup, and that is generating a pending interrupt before you have made a call to enable the interrupt which immediately ends up firing the ISR?

[lpcware]

Content originally posted in LPCWare by dev2. on Tue Oct 13 01:34:41 MST 2015
Thanks. It worked.

Any logic why it has to be cleared before enabling it?

[lpcware]

Content originally posted in LPCWare by R2D2 on Tue Oct 13 01:25:54 MST 2015

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Quote: dev2.
Any pointers on what could be the reason for this behavior?

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You don't clear the interrupts before you enable them...