LPC1317 usart register, 2 diff regsiters having same address

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

LPC1317 usart register, 2 diff regsiters having same address

490 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by aamir ali on Wed Aug 28 03:16:57 MST 2013
In usart how can 2 different registers share same address.

1.  RBR,THR,DLL share same address. RBR & THR can be same like as they are buffer register but DLL has different functin. How can it share address. Or it the function of DLAB bit which make changes ion hardware register on when a regsiter will be accessed.
So if DLAB = 0 & read then RBR
if DLAB = 0 & write then THR
if DLAB = 1 & r/w then DLL.

2. Or same goes for ( DLM & IER ) & ( IIR & FCR ).
Labels (1)
0 Kudos
2 Replies

462 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by greenemily on Thu Oct 24 22:02:44 MST 2013
Thank you very much for the writeup. I agree with what you say. I have been talking about this subject a lot lately with my brother so hopefully it will be to see him. my point of view
best hotel deals
0 Kudos

462 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by NXP_Paul on Wed Aug 28 06:11:16 MST 2013
Your understanding is correct.  The register access will depend upon the status of DLAB.
Please see the LPC13xx UART examples that can be found at:
http://www.lpcware.com/node/11538/78
0 Kudos