Ni: LPCXpresso Debug Driver v7.8 (May 28 2015 02:56:34 - crt_emu_lpc11_13_nxp.exe build 181) Pc: ( 0) Reading remote configuration Pc: ( 5) Remote configuration complete Pc: ( 30) Emulator Connected Pc: ( 40) Debug Halt Pc: ( 50) CPU ID Nc: Emu(0): Conn&Reset. CpuID: 410CC200. Info: HID64HS12 Nc: Debug protocol: SWD Frequency 250 KHz. RTCK: Disabled. Vector catch: Disabled. Nc: loaded v.2 On-chip Flash Memory LPC11_12_13_128K_8K.cfx Nc: image 'LPC11_12_13 (128K Flash, min 8K RAM) May 21 2015 09:32:41' Nc: NXP: LPC1227/301 Part ID: 0x00000000 Pc: ( 65) Chip Setup Complete Nt: Connected: was_reset=false. was_stopped=false Cr:v LPCXpresso Free License - Download limit is 256K Pc: ( 70) License Check Complete Nt: Loading ELF file 'remote.axf' at location 00000000 Nt: Writing 996 bytes to address 0x00000000 in Flash Pb: 1 of 1 ( 0) Writing pages 0-0 at 0x00000000 with 996 bytes Ps: ( 0) at 00000000: 0 bytes - 0/996 Ps: (411) at 00000000: 4096 bytes - 4096/996 Nc: Progress meter completed at over 100% (4096/996 bytes) Nt: Erased/Wrote page 0-0 with 996 bytes in 215msec Pb: (100) Finished writing Flash successfully. Nt: Flash Write Done Nt: Loaded 0x3E4 bytes in 428ms (about 2kB/s) Nt: Reset target Nc: nSRST assert (if available) Nc: Executing in user flash. Wc: SWD Frequency (Final): 250 KHz. |
An internal error occurred during: "Launching remote Debug". IP Helper Library GetIpAddrTable function failed |
void GPIOSetValue( uint32_t portNum, uint32_t bitPosi, uint32_t bitVal )
{
if (bitVal == 0)
{
switch (portNum) {
case 0:
LPC_GPIO0->CLR = (1<<bitPosi);
break;
case 1:
LPC_GPIO1->CLR = (1<<bitPosi);
break;
case 2:
LPC_GPIO2 -> CLR = (1<<bitPosi);
default:
break;
}
}
else if (bitVal >= 1)
{
switch (portNum){
case 0:
LPC_GPIO0 -> SET = (1<<bitPosi);
break;
case 1:
LPC_GPIO1 -> SET = (1<<bitPosi);
break;
case 2:
LPC_GPIO2 -> SET = (1<<bitPosi);
break;
}
}
}
void GPIOSetDir( uint32_t portNum, uint32_t bitPosi, uint32_t dir )
{
if(dir)
switch (portNum) {
case 0:
LPC_GPIO0-> DIR |= 1<<bitPosi;
break;
case 1:
LPC_GPIO1-> DIR |= 1<<bitPosi;
break;
case 2:
LPC_GPIO2 -> DIR |= 1<<bitPosi;
break;
default:
break;
}
else
switch (portNum) {
case 0:
LPC_GPIO0->DIR &= ~(1<<bitPosi);
break;
case 1:
LPC_GPIO1->DIR &= ~(1<<bitPosi);
break;
case 2:
LPC_GPIO2->DIR &= ~(1<<bitPosi);
break;
default:
break;
}
} |
LPC_IOCON->R_PIO1_0 = 0x01; |
LPC_IOCON -> R_PIO1_0 = 0xb8; LPC_IOCON->R_PIO1_0 = 0x01; |
LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 16; LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 31; LPC_IOCON -> R_PIO1_0 = 0xb8; LPC_IOCON->R_PIO1_0 = 0x01; GPIOSetDir(1, 0, OUTPUT); GPIOSetValue(1, 0, HIGH); |
[u]LPC_IOCON -> PIO1_0 = (1 << 7);[/u] GPIOSetDir(1, 0, OUTPUT); GPIOSetValue(1, 0, HIGH); |
#ifdef __USE_CMSIS
#include "LPC122x.h"
#endif
#include <cr_section_macros.h>
#include <NXP/crp.h>
// Variable to store CRP value in. Will be placed automatically
// by the linker when "Enable Code Read Protect" selected.
// See crp.h header for more information
//__CRP const unsigned int CRP_WORD = CRP_NO_CRP ;
volatile uint32_t msTicks=0;
// ****************
// SysTick_Handler
void SysTick_Handler(void)
{
msTicks++;
}
int main(void)
{
/* Enable all three GPIO blocks and IOCON */
LPC_SYSCON->SYSAHBCLKCTRL |= 0xE001001FUL;
LPC_GPIO1->DIR = 1 << 0;
LPC_GPIO1->SET = 1 << 0;
/* Generate 1ms Ticks */
SysTick_Config(SystemCoreClock / 1000);
while (1)
{
switch (msTicks)
{
case 500:
msTicks = 0;
LPC_GPIO1->CLR = 1 << 0;
break;
case 100:
case 200:
case 300:
LPC_GPIO1->NOT = 1 << 0;
break;
}
__WFI();
}
} |
#define MAINCLKSEL_Val 0x00000000 #define SYSPLLCLKSEL_Val 0x00000000 |