When using any of the IAP functionality must all interrupts be disabled? Specifically we are (sometimes) crashing while using commands 61 and 62 to write or read to the on-chip EE. The way we've got it put together so far, interrupts are enabled and firing while the IAP functionality is executing. Looking for clarification ... should interrupts be disabled?
Regards
For the EEPROM IAP calls, interrupts should be disabled. If an interrupt occur during the EEPROM call, a hard fault can occur.