LPC1114JBD48/333 Power Profile

[RodrigoLippi]

Hello,
I'm having a problem with LPC1114JBD48/333.
My project is in progress and I need to solve the consumption problem. In the datasheet it says that the consumption would be below 1mA to 4MHz but it is consuming 3.5mA. This is not acceptable.
Below is my code:

/* set_pll mode options */
#define CPU_FREQ_EQU 0
#define CPU_FREQ_LTE 1
#define CPU_FREQ_GTE 2
#define CPU_FREQ_APPROX 3
/* set_pll result0 options */
#define PLL_CMD_SUCCESS 0
#define PLL_INVALID_FREQ 1
#define PLL_INVALID_MODE 2
#define PLL_FREQ_NOT_FOUND 3
#define PLL_NOT_LOCKED 4

/* set_power mode options */
#define PWR_DEFAULT 0
#define PWR_CPU_PERFORMANCE 1
#define PWR_EFFICIENCY 2
#define PWR_LOW_CURRENT 3
/* set_power result0 options */
#define PWR_CMD_SUCCESS 0
#define PWR_INVALID_FREQ 1
#define PWR_INVALID_MODE 2

typedef struct _PWRD {
void (*set_pll)(unsigned int cmd[], unsigned int resp[]);
void (*set_power)(unsigned int cmd[], unsigned int resp[]);
} PWRD;
typedef struct _ROM {
const PWRD * pWRD;
} ROM;
ROM ** rom = (ROM **) (0x1FFF1FF8 + 3 * sizeof(ROM**));
unsigned int command[4], result[2];

int main (void) {

Delay_Ms(1000);
SystemCoreClockUpdate();
LPC_SYSCON->SYSAHBCLKCTRL = 0x1F;

command[0] = 4000;
command[1] = 4000;
command[2] = CPU_FREQ_EQU;
command[3] = 0;
(*rom)->pWRD->set_pll(command, result);

command[0] = 4;
command[1] = PWR_EFFICIENCY;
command[2] = 4;
(*rom)->pWRD->set_power(command, result);

while (1) /* Loop forever */
{

}
}

 it's causes Hard Fault Handler.

There's something wrong?

Have a Nice Day!!!

[xiangjun_rong]

Hi, Rodrigo,

Regarding the set_pll function:

command[0] = 4000;
command[1] = 4000;
command[2] = CPU_FREQ_EQU;
command[3] = 0;
(*rom)->pWRD->set_pll(command, result);

It appears that above parameters are incorrect.

Pls refer to Fig 12 in UM10398.pdf, the first parameter0 command[0] is the system PLL input frequency, depending on the SYSPLLCLKSEL reg setting, it can be irc_osc_clk(12MHz) or sys_osc_clk(it is dependent on the external crystal frequency on the XTALIN/XTALOUT pins), in default, it is 12MHz instead of 4000(4MHz) I think. The parameter1 is expected system clock (in kHz), I do not think it is 4MHz, it should be for example 50MHz, the value is 50000.,

BTW, if you want to set up the main clock frequency as 4MHz, you do not need to use pll, you can use the 12MHz irc_osc_clk(12Mhz) as main clock, use the CLOCK DIVIDER to get 4MHz with 3 divider, the system clock will be 4MHz, it is okay.

Hope it can help you

BR

Xiangjun rong

[RodrigoLippi]

Hi Xiang!

 At first I would like to thank you for your response!

 I would like to leave the frequency of the core and peripherals at 4MHz, I need to keep the consumption as low as possible in the program loop.

SEL is configured for IRC and System AHB Div at 0x03.

New Code:

command[0] = 12000;
command[1] = 4000;
command[2] = CPU_FREQ_EQU;
command[3] = 0;
(*rom)->pWRD->set_pll(command, result);

command[0] = 12;
command[1] = PWR_EFFICIENCY;
command[2] = 4;
(*rom)->pWRD->set_power(command, result);

but I still have HardFault_Handler after running this code.

any suggestion?

Regards.