LPC1114 ADC Timer Triggered read problem

cancel
Showing results for 
Search instead for 
Did you mean: 

LPC1114 ADC Timer Triggered read problem

Jump to solution
316 Views
Ebrahim431
Contributor II

Hi,

I want to read all ADC Channels in a row, i.e. starting from ch0 to ch7, by triggering it using 16bit Timer0 and proceeding to next channel in ADC ISR. Due to some limitations, I don't want to use Burst Mode and try to emulate it using timer trigger feature.

 

Scenario1: Reading ch0 to ch6, it works well

Scenario2: Reading ch0 to ch7, it stucks on the transition from ch6 to ch7 (DONE bit is not set in GDR register)

Scenario3: Reading ONLY ch6 and ch7, it stucks on the transition from ch6 to ch7 (DONE bit is not set in GDR register)

Scenario4: Reading ONLY ch5 and ch7, it works well

 

In summary, the transition from ch6 to ch7 causes stuck (GDR bit not set)

Question: what could be the problem? Isn't it a hardware problem?

Thanks in advance

Tags (3)
0 Kudos
1 Solution
296 Views
Ebrahim431
Contributor II

Problem fixed. There was a mistake in my code which causes ch6 remained enable even if I expected it to be disable

View solution in original post

0 Kudos
3 Replies
309 Views
Alice_Yang
NXP TechSupport
NXP TechSupport

Hello Ebrahim431,

What about the part number of your chip? (full name)

How about testing only use CH6? 

 

BR

Alice

0 Kudos
305 Views
Ebrahim431
Contributor II

Hi Alice,

The exact part number is LPC1114FBD48/302

Sampling only ch6 whenever the timer is triggered works well

Sampling only ch6 and ch7, starting from ch7 leads to sampling ch7, ch6 but when we want to sample ch7 again it stucks

Sampling only ch6 and ch7, starting from ch6 leads to sampling ch6 but when we want to sample ch7, it stucks

The same scenario of sampling ch6 and ch7 works well when I use ch5 and ch7

 

As a workaround I tried to sample all channels in reverse order, i.e. ch7 to ch0, Now after sampling ch0, It returns to sample ch7, and it stucks again. 

In summary, there is a problem with ch7 ... it stucks (DONE bit of GDR register is not set and CHN bits of GDR shows ch6 instead of ch7, as if ch6 was sampled)

I guess there might be an issue with MCU hardware

 

Thanks for your help

 

0 Kudos
297 Views
Ebrahim431
Contributor II

Problem fixed. There was a mistake in my code which causes ch6 remained enable even if I expected it to be disable

0 Kudos