LCD Bandwidth Questions and Explanation of the Calculator

[lpcware]

Content originally posted in LPCWare by Martin84 on Mon Oct 07 10:46:27 MST 2013
Hi everybody,

I'm now trying to understand the LCD Bandwidth Calculator for the 18xx/43xx and the theory of the AHB-Bus.

The calculation for the framebuffer size is easy, it is the product of the resolution times the color depth in bytes. To determine the LCD Data Rate I take the Pixels for one frame and multiply this value with the refresh rate. So I get e.g. 640x480x60Hz = 18432000 Pixels/s = 18,432MPixel/s.

To get the Mbit/s value, we multiply the MPixel/s with the size of one Pixel. So 18,432 MPixel/s x 16 Bit/Pixel = 294,912 Mbit/s.
To get the MWords/s, we have to know that 1 Word = 32 bit. -> 294,912Mbit/s / 32bit = 9,216 MWords/s.

With the Note in the calculator sheet, we know that 1 Burst = 4 words. So we get 9,216 MWords/s / 4 Words = 2,304MBursts/s. Here I got the first question, but I could answer this question with the help of the LPC4357-User Manual and the EMC-Section.
A: For a 32-bit external memory bus the burst size is 4 words.

Now the next thing in the calculator sheet is to determine the duration of one burst in clock cycles. So the formula in the sheet is

Duration[clocks] = 7 + trp + RAS_Latency + CAS_Latency - 2 + 4 * 32bit/32bit

What do the given values (7 and - 2) mean?
4*32bit means the length of 1 Burst and the other 32 bit are the EMC Bandwith, or am I wrong?

So: Duration[clocks] = 7 + trp + RAS_Latency + CAS_Latency - 2 + 1Burst / EMC_Width?

The Busload is determined with (MBursts/s * Duration[clocks]) / EMC_frequency[MHz].

So the busload can be determined with the 'duration of all Burst per seconds' referred to 'EMC_frequency'?

The calculated busload is only the portion of the AHB Bus which is needed by LCD Controller reading from SDRAM. Additional to that there will be a portion used for writing pixel data from EMC-Controller to SDRAM and for reading image data from SD-Card?

Regards,

Martin

[lpcware]

Content originally posted in LPCWare by bavarian on Thu Oct 17 03:14:19 MST 2013
Hello Martin,

the access times on an SDRAM are quite complicated when it comes to burst accesses. That's why there are components in the formula with a fixed time and a variable part depending on the data bus width.

For the LCD interface we need to know that there is big difference between 16-bit and 24 bit colors. For 16-bit colors you need to obviously 16 bits per pixel. Already for 18-bit colors you need catch 32 bits for each pixel, only 18 bits are used.
So the difference between 16-bit and 18-bit colors in terms of required bandwidth on the interface is factor 2.
Then it also depends on the bus width of the SDRAM device. The memory controller (see http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0236h/I1012492.html) makes always bursts of 16 bytes, so either 4 x 32 bits, 8 x 16 bits or 16 x 8 bits. The fastets way to get 16 bytes is of course with a 32-bit SDRAM.

The fixed number of cycles (7 and -2) belong to the specification of the SSDRAM controller, maybe you find some hints here:  http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0236h/I1012492.html)

Finally the load on the bus is determined by the number of cycles you need for a given LCD + memory setup. And how many of these cycles fit into 1s depends on the EMC bus frequency.

And you're right. The spreadsheet only calculates the load for a transfer from SDRAM to the LCD. If you need/want to update the data in the display buffer, then this is an additional load.

Regards,
NXP Support