Content originally posted in LPCWare by bavarian on Mon Jun 30 06:02:45 MST 2014
Well, I won't exclude a damaged JTAG port. We have seen this effect sometimes, it is due to the different power supply domains of the board supply and the debugger supply. The voltage potential difference can be huge for a short time frame, high enough to destroy the JTAG input TDI under some circumstances.
The chip will still work fine, e.g. with the ISP mode, but the JTAG/SWD port is not longer working.
If you look at the JTAG signal(s) then you might see them floating somewhere in the middle of 3,3V
Regards,
NXP Software Support.