Issue in Allocation of Variable in External RAM(SDRAM) in LPC43XX(LPC4367)

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Issue in Allocation of Variable in External RAM(SDRAM) in LPC43XX(LPC4367)

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gauravmore
Contributor III

Hello,

I am using LPC4367 Tri core controller for one of our development. I have interfaced SDRAM with LPC4367 using EMI lines. There while testing on the sample code I am facing issue. Following is the details regarding the issue,

I created a project for M4 Core only. Then in properties -> MCU setting ->Memory management block I added the RAM SDRAM with size 8MB refer the Screen Shot below. RAM8 alias.

gauravmore_0-1638451893436.png

After that I created a variable name M4_Buffer[1024*1024]. And  I assigned it to the memory location using the below statement.

__DATA(RAM8) uint8_t M4_Buffer[BUFF_SIZE];

 and in the main code I initialize it to 0 using memset command.

memset(M4_Buffer, 0x00, sizeof(M4_Buffer));

After doing the above modification I compiled the code and I got the below error.

gauravmore_1-1638452188737.png

Here I saw that the flash memory exceeded. but I have allocated the memory to SDRAM then how come it gives this error after accessing the allocated memory.

Also refer the attached code in order to check the method if it is wrong.  Let us know the issue since it is critical for us considering the product development.

BR

Gaurav More

 

 

 

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello Gaurav More,

Change

__DATA(RAM8) uint8_t M4_Buffer[BUFF_SIZE];

to

__NOINIT(RAM8) uint8_t M4_Buffer[BUFF_SIZE];

or

__BSS(RAM8) uint8_t M4_Buffer[BUFF_SIZE];

 

BR

Alice

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4,293 Views
Alice_Yang
NXP TechSupport
NXP TechSupport

Hello Gaurav More,

Change

__DATA(RAM8) uint8_t M4_Buffer[BUFF_SIZE];

to

__NOINIT(RAM8) uint8_t M4_Buffer[BUFF_SIZE];

or

__BSS(RAM8) uint8_t M4_Buffer[BUFF_SIZE];

 

BR

Alice

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gauravmore
Contributor III

Hello Alice,

Implemented the given solution and the issue resolved. Now i have allocated it to the internal memory and verified the same and it is working.

Now need to check with the SDRAM allocation. But before that i was checking the SDRAM interface and while check that i found that the data is not getting written properly . i have written the test code for the same. 

I have attached the test code for reference, Also check the below code used for initialization of SDRAM.

static const IP_EMC_DYN_CONFIG_T AS4C4M16SA_CI_Config =
{
		EMC_NANOSECOND(64000000 / 4096),	/* Row refresh time (RefreshPeriod)*/
		0x01,								/* Dynamic Memory Read Configuration*/
		EMC_NANOSECOND(18),	//18								/*!< Precharge Command Period */
		EMC_NANOSECOND(42),	//42								/*!< Active to Precharge Command Period */
		EMC_NANOSECOND(70),	//70				/*!< Self Refresh Exit Time */
		EMC_CLOCK(1),					/*!< Last Data Out to Active Time */
		EMC_CLOCK(5),					/*!< Data In to Active Command Time */
		EMC_NANOSECOND(12),					/*!< Write Recovery Time */
		EMC_NANOSECOND(60),	//60					/*!< Active to Active Command Period */
		EMC_NANOSECOND(60),	//60				/*!< Auto-refresh Period */
		EMC_NANOSECOND(70),	//70				/*!< Exit Self Refresh */
		EMC_NANOSECOND(12),	//12				/*!< Active Bank A to Active Bank B Time */
		EMC_CLOCK(2),					/*!< Load Mode register command to Active Command */
		{
			{	/*!< Device Configuration array with SDRAM Mode register*/
				EMC_ADDRESS_DYCS0,				/* Base Register*/

				3,								/* RAS */

												/* Mode Register value*/
				EMC_DYN_MODE_WBMODE_PROGRAMMED |
				EMC_DYN_MODE_OPMODE_STANDARD |
				EMC_DYN_MODE_CAS_3 |
				EMC_DYN_MODE_BURST_TYPE_SEQUENTIAL |
				EMC_DYN_MODE_BURST_LEN_8,

													/* Device Config [0]*/
				EMC_DYN_CONFIG_DATA_BUS_16 |
				EMC_DYN_CONFIG_LPSDRAM |
				EMC_DYN_CONFIG_4Mx16_4BANKS_12ROWS_8COLS |
				EMC_DYN_CONFIG_MD_SDRAM
			},
			{0, 0, 0, 0},	/* Device Config [1]*/
			{0, 0, 0, 0},	/* Device Config [2]*/
			{0, 0, 0, 0}	/* Device Config [3]*/
		}
};

The problem observed is that the data assigned is getting corrupt. the test code is getting the failed. I am using "AS4C4M16SA-6TIN" for our development purpose.

Please check the code and let us know if any modification required.

BR,

Gaurav More

 

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello ,

About SDRAM using, please refer to "periph_memtest" demo under LPCopen for lpc4357,

and  https://www.nxp.com.cn/docs/en/application-note/AN11508.pdf

 

BR

Alice

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gauravmore
Contributor III

Hi Alice,

Please find the observation below by referring the screen shot below

gauravmore_1-1642401627447.png

Here you can see the behavior of SDRAM. I have written the below code to test the SDRAM interface. i am able to write some address with fix values correctly. shown above in color line.  But after that Instead of 0xA5A5 it is writing 0xADA5. 

What could be the problem? Similarly when i tried with 0x5A5A then it is written properly. 

 

SDRAMIssue_1.png

 

Please check the same with the attached code for your reference.

BR,

Gaurav More

 

 

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frank_m
Senior Contributor III

> Here you can see the behavior of SDRAM. I have written the below code to test the SDRAM interface. i am able to write some address with fix values correctly. shown above in color line.  But after that Instead of 0xA5A5 it is writing 0xADA5. 

I would first confirm the results in instruction step mode, i.e. the core register written to the SDRAM address really contains 0xA5A5 and the SDRAM cell contains 0xADA5 after the write

Anyway, the difference between 0x5 and 0xD is only one bit (the MSB). There might be a hardware problem (i.e. bit 10 is forcing bit 11). But I would try other pattern before.

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gauravmore
Contributor III

Hi Frank,

Thanks for the reply,

I checked the hardware and found one line configuration missing which is D11 to be configured as EMC line in the controller which i did modify and confirm the behavior.

Now the SDRAM test code is working as per the expectation. I will check it by using __DATA and __BSS attributes by allocating the variable in the SDRAM location since there it is not working.

I will reconfirm the same and revert with the result. But till date the test code for SDRAM using pointer variable is working with 2byte configuration. Also find the attached modified code.

BR,

Gaurav More

 

 

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello gauravmore,

Thanks for your sharing.

For quickly help you solve question, for your now your new question (maybe now maybe you have solved it )"I will reconfirm the same and revert with the result. But till date the test code for SDRAM using pointer variable is working with 2byte configuration. Also find the attached modified code."

recommend create a new case.

 

BR

Alice

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gauravmore
Contributor III

Hi Alice,

Thanks for the reply.

Created new case and posted it forum as well. Refer the link below

https://community.nxp.com/t5/LPC-Microcontrollers/SDRAM-interface-issue-with-LPC4367-Controller-usin...

BR,

Gaurav More

 

 

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gauravmore
Contributor III

Hi Alice,

We have already implemented the same using the application note. we have the development board customized with us and we were working on it . I checked with the test code and verified the SDRAM. But after doing some modification related to the other SDRAM AS4C4M16SA-6TIN  which is 8MB, the test code is not working. also I tried reducing the frequency to 50Mhz from 100MHz.

so I shared the code for the same and expect your review comments for the same. Also find attached PDF of the SDRAM used. 

BR,

Gaurav More

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gauravmore
Contributor III

Hello Alice,

Thanks for the response.

I will check as per your suggestion . One more query, will it be possible to use this variable by updating the data in that variable?

BR

Gaurav More

 

 

 

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello,

Sorry I'm not understand your second question clearly, while I think you can first try on your code, you can contact me if still have issue.

 

BR

Alice

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frank_m
Senior Contributor III

The error messages don't say much.

Open the created map file (enable it before if necessary), and check which data definition(s) are the culprit.

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gauravmore
Contributor III

Hi Frank,

Any update regarding the issue of allocation. I am not able to get the cause for the same. Also is there any thing missing in the code or the project shared. 

Please revert for the same. Since it is very critical for us with respect to the development.

BR

Gaurav More

 

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frank_m
Senior Contributor III

If this issue is critical for your project, you better approach NXP directly, e.g. the support.

This is a public forum, which means there is no guarantee for an answer. And many posters (like me) are customers like you, and not NXP employees.

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gauravmore
Contributor III

Hi Frank,

Thanks for the response,

I have checked the MAP file but not able to where it is allocating the space in the flash. Refer the below map file for the attached code. Following are the two different locations in the map where we can see the M4_buffer allocated. Below screen shot shows that it is allocated to SDRAM memory which is intended.  

gauravmore_0-1638516640152.png

In the below screen show is the other location for M4_Buffer. So it seems there is no such information of the buffer occupying the main flash of M4 core. 

gauravmore_1-1638516793854.png

Still after compilation it give the below error, refer the screen shot below

 

12:58:43 **** Incremental Build of configuration Debug for project M4Core_ExternalMemAlloc ****
make -r -j12 all 
Building file: ../src/M4Core_ExternalMemAlloc.c
Building file: ../src/cr_startup_lpc43xx.c
Building file: ../src/crp.c
Building file: ../src/sysinit.c
Invoking: MCU C Compiler
arm-none-eabi-gcc -DDEBUG -D__CODE_RED -DCORE_M4 -D__USE_LPCOPEN -DNO_BOARD_LIB -D__LPC43XX__ -D__REDLIB__ -I"C:\Users\20020304\Box\GAURAV MORE\PROJECTS\NEW FEEDER RELAY\F4 Series\SourceCode\TestCode\ExternalRAMAllocation\lpc_chip_43xx\inc" -I"C:\Users\20020304\Box\GAURAV MORE\PROJECTS\NEW FEEDER RELAY\F4 Series\SourceCode\TestCode\ExternalRAMAllocation\lpc_chip_43xx\inc\usbd" -O0 -fno-common -g3 -Wall -c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fsingle-precision-constant -fmerge-constants -fmacro-prefix-map="../src/"=. -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -mthumb -fstack-usage -specs=redlib.specs -MMD -MP -MF"src/M4Core_ExternalMemAlloc.d" -MT"src/M4Core_ExternalMemAlloc.o" -MT"src/M4Core_ExternalMemAlloc.d" -o "src/M4Core_ExternalMemAlloc.o" "../src/M4Core_ExternalMemAlloc.c"
Invoking: MCU C Compiler
arm-none-eabi-gcc -DDEBUG -D__CODE_RED -DCORE_M4 -D__USE_LPCOPEN -DNO_BOARD_LIB -D__LPC43XX__ -D__REDLIB__ -I"C:\Users\20020304\Box\GAURAV MORE\PROJECTS\NEW FEEDER RELAY\F4 Series\SourceCode\TestCode\ExternalRAMAllocation\lpc_chip_43xx\inc" -I"C:\Users\20020304\Box\GAURAV MORE\PROJECTS\NEW FEEDER RELAY\F4 Series\SourceCode\TestCode\ExternalRAMAllocation\lpc_chip_43xx\inc\usbd" -O0 -fno-common -g3 -Wall -c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fsingle-precision-constant -fmergeInvoking: MCU C Compiler
Invoking: MCU C Compiler
-constants -fmacro-prefix-map="../src/"=. -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -mthumb -fstack-usage -specs=redlib.specs -MMD -MP -MF"src/cr_startup_lpc43xx.d" -MT"src/cr_startup_lpc43xx.o" -MT"src/cr_startup_lpc43xx.d" -o "src/cr_startup_lpc43xx.o" "../src/cr_startup_lpc43xx.c"
arm-none-eabi-gcc -DDEBUG -D__CODE_RED -DCORE_M4 -D__USE_LPCOPEN -DNO_BOARD_LIB -D__LPC43XX__ -D__REDLIB__ -I"C:\Users\20020304\Box\GAURAV MORE\PROJECTS\NEW FEEDER RELAY\F4 Series\SourceCode\TestCode\ExternalRAMAllocation\lpc_chip_43xx\inc" -I"C:\Users\20020304\Box\GAURAV MORE\PROJECTS\NEW FEEDER RELAY\F4 Series\SourceCode\TestCode\ExternalRAMAllocation\lpc_chip_43xx\inc\usbd" -O0 -fno-common -g3 -Wall -c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fsingle-precision-constant -fmerge-constants -fmacro-prefix-map="../src/"=. -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -mthumb -fstack-usage -specs=redlib.specs -MMD -MP -MF"src/sysinit.d" -MT"src/sysinit.o" -MT"src/sysinit.d" -o "src/sysinit.o" "../src/sysinit.c"
arm-none-eabi-gcc -DDEBUG -D__CODE_RED -DCORE_M4 -D__USE_LPCOPEN -DNO_BOARD_LIB -D__LPC43XX__ -D__REDLIB__ -I"C:\Users\20020304\Box\GAURAV MORE\PROJECTS\NEW FEEDER RELAY\F4 Series\SourceCode\TestCode\ExternalRAMAllocation\lpc_chip_43xx\inc" -I"C:\Users\20020304\Box\GAURAV MORE\PROJECTS\NEW FEEDER RELAY\F4 Series\SourceCode\TestCode\ExternalRAMAllocation\lpc_chip_43xx\inc\usbd" -O0 -fno-common -g3 -Wall -c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fsingle-precision-constant -fmerge-constants -fmacro-prefix-map="../src/"=. -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -mthumb -fstack-usage -specs=redlib.specs -MMD -MP -MF"src/crp.d" -MT"src/crp.o" -MT"src/crp.d" -o "src/crp.o" "../src/crp.c"
Finished building: ../src/cr_startup_lpc43xx.c
Finished building: ../src/crp.c
 
 
../src/M4Core_ExternalMemAlloc.c: In function 'main':
../src/M4Core_ExternalMemAlloc.c:45:5: warning: implicit declaration of function 'memset' [-Wimplicit-function-declaration]
   45 |     memset(M4_Buffer, 0x00, sizeof(M4_Buffer));
      |     ^~~~~~
../src/M4Core_ExternalMemAlloc.c:20:1: note: 'memset' is defined in header '<string.h>'; did you forget to '#include <string.h>'?
   19 | #include <cr_section_macros.h>
  +++ |+#include <string.h>
   20 | 
Finished building: ../src/sysinit.c
 
Finished building: ../src/M4Core_ExternalMemAlloc.c
 
Building target: M4Core_ExternalMemAlloc.axf
Invoking: MCU Linker
arm-none-eabi-gcc -nostdlib -L"C:\Users\20020304\Box\GAURAV MORE\PROJECTS\NEW FEEDER RELAY\F4 Series\SourceCode\TestCode\ExternalRAMAllocation\lpc_chip_43xx\Debug" -Xlinker -Map="M4Core_ExternalMemAlloc.map" -Xlinker --cref -Xlinker --gc-sections -Xlinker -print-memory-usage -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -mthumb -T "M4Core_ExternalMemAlloc_Debug.ld" -o "M4Core_ExternalMemAlloc.axf"  ./src/M4Core_ExternalMemAlloc.o ./src/cr_startup_lpc43xx.o ./src/crp.o ./src/sysinit.o   -llpc_chip_43xx
Memory region         Used Size  Region Size  %age Used
      MFlashA512:     1052812 B       512 KB    200.81%
c:/nxp/mcuxpressoide_11.2.1_4149/ide/plugins/com.nxp.mcuxpresso.tools.win32_11.2.0.202008311134/tools/bin/../lib/gcc/arm-none-eabi/9.2.1/../../../../arm-none-eabi/bin/ld.exe: M4Core_ExternalMemAlloc.axf section `.data_RAM8' will not fit in region `MFlashA512'
      MFlashB512:          0 GB       512 KB      0.00%
c:/nxp/mcuxpressoide_11.2.1_4149/ide/plugins/com.nxp.mcuxpresso.tools.win32_11.2.0.202008311134/tools/bin/../lib/gcc/arm-none-eabi/9.2.1/../../../../arm-none-eabi/bin/ld.exe: region `MFlashA512' overflowed by 528524 bytes
        RamLoc32:          16 B        32 KB      0.05%
collect2.exe: error: ld returned 1 exit status
        RamLoc40:          0 GB        40 KB      0.00%
        RamAHB32:          0 GB        32 KB      0.00%
        RamAHB16:          0 GB        16 KB      0.00%
    RamAHB_ETB16:          0 GB        16 KB      0.00%
      RamM0Sub16:          0 GB        16 KB      0.00%
       RamM0Sub2:          0 GB         2 KB      0.00%
           SDRAM:          1 MB         8 MB     12.50%
make: *** [makefile:32: M4Core_ExternalMemAlloc.axf] Error 1
"make -r -j12 all" terminated with exit code 2. Build might be incomplete.

12:58:45 Build Failed. 3 errors, 1 warnings. (took 2s.225ms)

 

 

below Also please check the attached code and request you to compile the same at your end and then you will be able to check at you end as well so that we can check at once.

Let me know if need any more information from your side.

BR 

Gaurav More

@vipinkumarmishr

 

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