Is clock stretching to be expected when clocking an I2C slave interface at 400 KHz? Using LPC54102. Wondering if it indicates a configuration issue.

[chrisoneill]

LPC54102

I2C0 slave

Using the I2C config and interrupt handler from LPCOpen periph_i2cs_interrupt demo

Using a master at 400 KHz, I see clocking stretching for every ACK, don't see it at 100 KHz.

I2C CLKDIV = 2

[Carlos_Mendoza]

Hi Chris,

I have reproduced the same behavior, the problem is that the I2C slave processing is handled entirely in the I2C slave interrupt handle in real-time, when using a 400KHz clock it will give the slave less time to do the processing. You could try modifying the handler removing the code not needed for your application and enabling the code optimization for the project.

Hope it helps!

Best Regards,
Carlos Mendoza
Technical Support Engineer