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- Re: IAP via JTAG on LPC1754
IAP via JTAG on LPC1754 #1
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IAP via JTAG on LPC1754 #1
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I need a more detailed explanation of IAP via the JTAG port. Documentation is verry limited, and I need to know what values the LR (link register) and the SP (stack pointer) need to be set to for IAP commands to work. I would also like to double check the values that I am using for the PC (program counter), r0 , and r1 are appropriate. At the moment I am able to halt the core and write to r0, r1, and the SP which by the UM are the only registers that need to be set. However when I step the core or restart the core, I tried both, r0 will change but r1, and the PC don't and I do not get a return in the RAM pointed to by r1. What do the other core registers need to be set to for this to work?
EDIT: I found that my immediate problem here was my code writing to the stack pointer rather than the program counter.. Doh!! I am still seeing odd behavior that I think is a result of not having a valid address in the link register. Is there a location I can point to to have the cpu just sit and spin or to I need to write a HALT command into RAM and point to it?
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You may find this old forum thread useful.
https://community.nxp.com/message/759606?commentID=759606#comment-759606
Basically you need to download a program into ram that makes I calls to program flash, you then need to download the data You want in the flash also into ram and the (repeatedly) call your ram program to do the programming. This is how all jtag flash programmers work.
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I appreciate the response. However I believe you have some misconceptions about programming parts..
"Basically you need to download a program into ram that makes I calls to program flash, you then need to download the data You want in the flash also into ram and the (repeatedly) call your ram program to do the programming. This is how all jtag flash programmers work."
I have written multiple programming algorithms for ARM cores from just about every major manufacturer and sorry, but this is not true. Most manufacturers have a particular way that they implement a programming interface that changes mostly based on how secure the part is. And that is not even mentioning all the other chips that utilize JTAG as a interface. Many parts flash can be written to directly.
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Sorry, but it is YOU that has the misconception about programming the flash on NXP LPC parts (which is what I was referring to). The ONLY way to program the flash on these parts is as I described. If you don't believe me. take a look at any of the flash drivers supplied by all the major toolchains (Keil, IAR, NXP etc). They all work in the same way - download code that programs the flash.
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I am plenty aware that that is how Segger programming algorithms work. I am also currently able to write to flash without uploading an additional boot loader into ram. Which, by the way, is stated as possible in the user manual. So I am not sure where you get your information but it would seem to be wrong.
Please see page 648 of UM10360.
"
32.9 JTAG flash programming interface
Debug tools can write parts of the flash image to the RAM and then execute the IAP call
"Copy RAM to Flash" repeatedly with proper offset.
"
