The Flexcomm6&7 blocks on the LPC551x allegedly support 4 channel pairs each, which requires 4 data pins per Flexcomm. However, I can't find any information of how to configure the pins for this mode of operation. Is this an oversight in the datasheet, or am I missing something?
It seems a similar issue exists for the LPC553x, too. The other LPC55xx family members don't seem to support this special feature on Flexcomm6&7.
See also application note AN12939 Table 1.
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Thank you Alice! I realized that the 4 channel pairs apparently use a single pin, as opposed to 4 separate pins.
This means, however, that the bit clock would have to be 4 times as high. I think the documentation could have been clearer in this respect, but ultimately you're right, it isn't an "issue".
Thanks again!
Thank you Alice! I realized that the 4 channel pairs apparently use a single pin, as opposed to 4 separate pins.
This means, however, that the bit clock would have to be 4 times as high. I think the documentation could have been clearer in this respect, but ultimately you're right, it isn't an "issue".
Thanks again!
Hello @sh9
There are no issues regarding the UM and AN.
The LPC55S1x microcontroller's Flexcomm Interfaces 6 and 7 each provide four I2S channel pairs for audio configuration. These interfaces can be programmed by modifying the relevant registers (e.g., P1CFG1 , P2CFG1, P3CFG1 ) in the register map.
Additionally, the built-in Configuration Tool offers a graphical interface to streamline the setup process.
BR
Alice