How to use internal Flash memory for data storage with so long execution times?

[lpcware]

Content originally posted in LPCWare by giusloq on Mon Apr 27 02:41:20 MST 2015
I need to save a small set of small variables, rarely changed during the execution time. Internal flash memory and IAP commands seem to me a good choice. I already read and studied AN11008 documentantion and code.

I have only one but big problem. When a variable is updated, a swap of sectors could happen. And this operation takes a long time (more than 100ms!). During this time, interrupts are disabled.

My gadget is a RS485 slave on a bus network. I use UART rx interrupts to receive bytes from the bus. If I disable interrupts for an interval of 100ms, I surely lost some bytes and I could end with problems on communication.

It seems the IAP routines can't be splitted in small parts and transformed using a state-machine pattern. So I can't see any way to solve this big problem.

Any suggestions? Is an external non-volatile memory the only solution?

[lpcware]

Content originally posted in LPCWare by MikeSimmonds on Tue Apr 28 10:45:04 MST 2015
Fundamentally, no other access is possible to the flash ram during erase or program operations.

This rules out executing ANY code in flash because the MPU would have to prefetch (i.e. read) from flash
This rules out interrupts because the vector table is at address zero in flash by default.

The code doing the erasing and programming is in the boot rom (not in flash).

If you relocate the vector table and the (entire) interrupt code (note 1) you will not be accessing flash
while it is busy.

So NO CODE in flash may run regardless of what sector(s) are being erased/programmed.

Note 1: If you want to get fancy, you can disable  all interrupts except those that are needed to be active
while the flash array is busy. Those that do remain active must execute entirely in ram.
The vector table always has to be copied to ram and relocated via VTOR.

Bottom line -- while erasing etc, you cannot access anywhere in flash!

Mike

[lpcware]

Content originally posted in LPCWare by giusloq on Tue Apr 28 06:03:10 MST 2015

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You can continue to have interrupts while erasing/programming flash IF all of the following are true.

1) You have relocated the vector table to ram (or at least out of flash) Hint: Lookup the VTOR register, AND
2) All possible interrupt routines (and any routines they may reference) are also in ram (or at least out of flash).

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Is this true even if I write flash sectors dedicated to user/config data and not code?

[lpcware]

Content originally posted in LPCWare by MikeSimmonds on Mon Apr 27 10:17:25 MST 2015
You can continue to have interrupts while erasing/programming flash IF all of the following are true.

1) You have relocated the vector table to ram (or at least out of flash) Hint: Lookup the VTOR register, AND
2) All possible interrupt routines (and any routines they may reference) are also in ram (or at least out of flash).
Search the forums for moving code to ram.

Hope this helps, Mike

[lpcware]

Content originally posted in LPCWare by wmues on Mon Apr 27 07:43:32 MST 2015
LPC177x/8x has 2K-4K of EEPROM memory.

[lpcware]

Content originally posted in LPCWare by R2D2 on Mon Apr 27 05:08:37 MST 2015
Then it's time to consider something external like FRAM  :O

[lpcware]

Content originally posted in LPCWare by giusloq on Mon Apr 27 04:47:40 MST 2015

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What about General purpose storage (GPREG0-4)  :quest:

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I think those registers are non-volatile only when a battery is used to supply RTC peripheral. In my case, I don't use RTC so I don't have a battery.

Another problem with GPREG, they are only 20 bytes. Maybe they are sufficient at the moment, but what happens if I will need additional bytes in the future?

[lpcware]

Content originally posted in LPCWare by R2D2 on Mon Apr 27 03:52:17 MST 2015

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Quote: giusloq
Any suggestions?

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What about General purpose storage (GPREG0-4)  :quest: