How to change startup_LPC54018.s of LPC54018 about flash

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How to change startup_LPC54018.s of LPC54018 about flash

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4,579件の閲覧回数
1668834026
Contributor I

Dear all,

      I find a problem when I change  the flash algorithm of LPC54018. In startup_LPC54018.s file, it has some description about flash. Compared with  LPC540xx/LPC54S0xx User Manual  document, I feel very confused because  the content about flash is different from the startup_LPC54018.s file. For instance, In table12 of document, the address of caps is not writabe from 3 to 23 bit, but startup_LPC54018.s file changes the address. In addtion, I don't understand these code mean, such as

DCD 0x00003F00 ;maxReadSize
DCD 0x68506850 ;maxClkRate,maxReadRate,maxHSReadRate,maxProgramRate
DCD 0x04030050 ;maxHSProgramRate,initDeInitFxId,clearStatusFxId,getStatusFxId
DCD 0x14110D09 ;setStatusFxId,setOptionsFxId,getReadCmdFxId,getWriteCmdFxId

Can you explain these code? I find there are differences compared the document.

Thanks.

MCU:

LPC54018JET180

FLASH:

W25Q128FVIG1812 

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4,412件の閲覧回数
Alice_Yang
NXP TechSupport
NXP TechSupport

Hello,

Below is feedback from development team:

"

The LPC540xx (Aruba Flashless) SPIFI header requirements are different for revision 0A and revision 1B silicon. We edited some descriptions accordingly.

 

The statement (must be 0) for bits 23:3 is not true. Boot ROM will work exactly the same even if those bits are all 1.

 

I will work edit the UM accordingly.

 

Should just say "Set to 0".

"


Have a great day,
TIC

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4,412件の閲覧回数
Alice_Yang
NXP TechSupport
NXP TechSupport

Hello 植渲 周,

We have an application notes(AN12122:LPC540xx Image Header Structure) for the image header. You can reference it. But there is also some issue as you mentioned.

I have report the issue to SE team, will reply you after I get answer.

Hope it helps,

BR

Alice

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1668834026
Contributor I

Thanks,  looking forward to your reply.

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4,413件の閲覧回数
Alice_Yang
NXP TechSupport
NXP TechSupport

Hello,

Below is feedback from development team:

"

The LPC540xx (Aruba Flashless) SPIFI header requirements are different for revision 0A and revision 1B silicon. We edited some descriptions accordingly.

 

The statement (must be 0) for bits 23:3 is not true. Boot ROM will work exactly the same even if those bits are all 1.

 

I will work edit the UM accordingly.

 

Should just say "Set to 0".

"


Have a great day,
TIC

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Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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4,045件の閲覧回数
NVazquez
Contributor IV

I am using a custom board with w25q32jvss spi flash.

 

Can anyone tell me how can I change the startup file for this SPI Flash?

#ifdef W25Q128JVFM
/* SPIFI Descriptor - W25Q128JVFM */
(void (*)(void))0x00000000, // 0xFFFFFFFF to default 1-bit SPI mode ;DevStrAdr
(void (*)(void))0x001870EF, // mfgId + extCount
(void (*)(void))0x00000000, // extid 0-3
(void (*)(void))0x00000000, // reserved
(void (*)(void))0x1301001D, // caps
(void (*)(void))0x00000100, // Blks + RESV1
(void (*)(void))0x00010000, // blkSize
(void (*)(void))0x00000000, // reserved
(void (*)(void))0x00000100, // pageSize + RESV2
(void (*)(void))0x00003F00, // maxReadSize
(void (*)(void))0x68506850, // maxClkRate,maxReadRate,maxHSReadRate,maxProgramRate
(void (*)(void))0x04030050, // maxHSProgramRate,initDeInitFxId,clearStatusFxId,getStatusFxId,
(void (*)(void))0x14110D09, // setStatusFxId,setOptionsFxId,getReadCmdFxId,getWriteCmdFxId
#endif

 

 

I compared both flashes most of the factors looks the same, I think I need to change the " mfgId + extCount".

 

not sure what is "extCount"?

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