How much capacitance can an GPIO handle?

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How much capacitance can an GPIO handle?

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by VigneshEP on Wed Aug 13 21:40:22 MST 2014
Hi,

This is about LPC1114FBD48/323 (XL series). For some pins I'd like to discharge a 10 nF cap charged to 3V3 directly through an GPIO driven low. Can I do that?

Regards,
Vignesh
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by MarcVonWindscooting on Fri Aug 22 07:50:52 MST 2014
Hi Wolfgang,

while I totally agree with you, that adding a resistor is the nice guy's way to do that, I really believe that 10nF will easily be handled by the GPIO, if it's not done thousands of times per second (causing heat dissipation problems). The GPIOs are simply to 'weak' and all CMOS devices typically drive capacitive loads - the inputs of other CMOS devices! IIRC latch up happens, if we drive an input or output beyond the rails (<-0.6V or >Vdd+0.6V).

Marc
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by wmues on Thu Aug 14 01:08:06 MST 2014
You will find no answer on this topic in the data sheet.

Without any protection, discharging a capacitor will drive a high current through to GPIO, and will likely trigger the latch-up-effect. Latch-Up happens at currents above 100...200mA.

If I have to discharge a capacitor from a GPIO, I will add a series resistor to the GPIO to limit the current below the latch-up value. A 100Ohm resistor will limit the current to 33mA. The discharge time constant will be 100Ohm * 10nF = 1us. So let's say, after 10us discharging, the capacitor will be nearly discharged to 0V.

regards
Wolfgang
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