Help with Clocks on the LPC55S69 Using I2S with the PCM1780 and PLL1705

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Help with Clocks on the LPC55S69 Using I2S with the PCM1780 and PLL1705

397 次查看
AveryDauben
Contributor II

Hello, this is my first project trying to implement real-time DSP and I2S.

 

I don't fully understand how to properly set up the clocks for the specific applications with the PCM1780 and the PLL1705 for the LPC55S69.

 

I would like to run a 48 KHz sample frequency using the I2S, and the PCM1780 allows for oversampling which I would do at 256 times the sampling frequency bringing that clock speed to 12.288 MHz. The PLL1705 is able to output this Oversampling Frequency which would be the System/Master clock of the DAC. This is where I am confused.

 

Do I route this Master Clock into the LPC55S69 and derive the clock for the I2S driver where it can handle the Data and Bit Clocks which are at 64 times the sampling frequency and the LRCLK which is at the sampling frequency? If not, what else should I do?

 

Any help with example C code would be helpful too, I am using the clock tools menu for all clock configuration.

 

Thank you, Avery Dauben

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386 次查看
Habib_MS
NXP Employee
NXP Employee

Hello @AveryDauben,
I understand that you intend to use this method:

Habib_MS_0-1743715714941.png

In this case, you need to configure the I2S module to receive an external MCLK signal. Based on this external MCLK, the module will generate the other I2S signals, such as the BCLK.

Habib_MS_2-1743715988200.png

Currently, there is not an application note available that specifically uses an external MCLK. However, you can refer to the SDK (version 25.03) examples that use an internal MCLK and make the necessary modifications:

Habib_MS_1-1743715721471.png

Also, if you experience any issue, does not hesitate to let me know.
BR
Habib

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