GPIO state in Deep-Sleep

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

GPIO state in Deep-Sleep

749 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by cavalihno on Fri Jun 26 00:58:16 MST 2015
Hello !
In which state (pull up/down, high impedance) are GPIO pins during a Deep-Sleep in LPC11C14 ? Is it configurable ?
Labels (1)
0 Kudos
Reply
1 Reply

622 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by nerd herd on Fri Jun 26 08:17:00 MST 2015
Hi cavalihno,

Section 3.9.3 of the LPC11Cxx UM states that the logic levels of the GPIO pins remain static in Deep-sleep mode. This means you can configure them to whatever you want and then enter Deep-sleep mode. Here's a link to the UM:

http://www.nxp.com/documents/user_manual/UM10398.pdf
0 Kudos
Reply