Execution frequency(72MHz--->120MHz)

[lpcware]

Content originally posted in LPCWare by shiggy on Sun Sep 22 00:02:34 MST 2013
Hi Everyone!

I have changed the code execution frequency from 72MHx to 167MHz by using the bellow code.
Q1) Is my programming code correct or necessay some modification?
Q2)Is the two step frequency_up(72MHz--->110MHz---->120MHz) necessay?
  (depending on the Chp 10.2.1 of UM10430)
A)CGU_InitX(void)code working correctly at present.

If you give me any comment, I mam very happy.

------------------------------------------------------------------
uint32_t CGU_InitX(void){
CGU_SetXTALOSC(12000000);
CGU_EnableEntity(CGU_CLKSRC_XTAL_OSC, ENABLE);
CGU_EntityConnect(CGU_CLKSRC_XTAL_OSC, CGU_CLKSRC_PLL1);
// Disable PLL1 CPU hang???
//CGU_EnableEntity(CGU_CLKSRC_PLL1, DISABLE);//AAA if this is, error
//CGU_SetPLL1(6);//<----- execution FRQ is 72MHz//AAA
CGU_SetPLL1(10);  //<----- execution FRQ is 167MHz//AAA
CGU_EnableEntity(CGU_CLKSRC_PLL1, ENABLE);
CGU_EntityConnect(CGU_CLKSRC_PLL1, CGU_BASE_M3);
CGU_UpdateClock();
return 0;
}
-----------------------------------------------------------------
Shiggy

[lpcware]

Content originally posted in LPCWare by sampullman on Tue Oct 01 21:42:43 MST 2013
Ah, yes. I did end up reading through the user manual, although I have been unable to implement the so called "ramp up" that is required to run the CPU at 180Mhz, or even 150Mhz. I'm sure it's just a matter of persistence, although it would be nice to have some functioning example code.

[lpcware]

Content originally posted in LPCWare by cfbsoftware on Tue Oct 01 20:50:00 MST 2013
You need to refer to the User Manual (UM10430) not the Datasheet for this sort of detail.

[lpcware]

Content originally posted in LPCWare by sampullman on Wed Sep 25 00:20:12 MST 2013
I'm interested in where you're getting the 167MHz number from. If your external oscillator is at 12MHz and PLL1 multiplier is 10, shouldn't that be 120MHz?

I was about to post a question about this myself, since I can't seem to get above 120MHz. The CPU stalls when I call CGU_SetPLL1(mult) with mult > 10.

The datasheet says there is a Current Controlled Oscillator that uses the external oscillator multiplied by 1-32. The PLL output is then set with an output divider that can be 2/4/8/16. However, I can't find a detailed description of the relevant register settings to control this. Does any of this make sense or am I missing something here?