Do all the Freescale/NXP ARM Cores permit write-thru cache policy? From ARM documents A-7 seems to.

[Rusty]

According to ARM, A-7 permits write-thru cache policy. Does LS1022A implement this? What about other Freescale/NXP ARM cores?

[Pavel]

Look at the following page from ARM Community:

https://community.arm.com/thread/5003

Have a great day,
Pavel Chubakov

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