Deep power down - SRAM

[lpcware]

Content originally posted in LPCWare by kiryat8 on Wed Feb 05 07:54:44 MST 2014
I would like to set my LPC1752 to the lower power mode "Deep power down".
Am I correct in understanding that the SRAM is not maintained in this mode while it is stable in all other modes?
Thanks

[lpcware]

Content originally posted in LPCWare by mc on Wed Feb 05 20:05:21 MST 2014
Hi kiryat,
You are correct. In Deep Power-down mode, power is shut off to the entire chip with the exception of the
Real-Time Clock, the RESET pin, the WIC, and the RTC backup registers.
Check app note here
http://www.lpcware.com/content/nxpfile/an10915-using-lpc1700-power-modes